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74ABT125N,602 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74ABT125N,602
NXP
NXP Semiconductors. NXP
74ABT125N,602 Datasheet PDF : 15 Pages
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Nexperia
74ABT125
Quad buffer; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
1OE to 4OE
1A to 4A
1Y to 4Y
GND
VCC
Pin
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
14
6. Functional description
Description
output enable input (active LOW)
data input
data output
ground (0 V)
supply voltage
Table 3. Function selection[1]
Inputs
nOE
nA
L
L
L
H
H
X
Output
nY
L
H
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VCC
supply voltage
VI
input voltage
VO
output voltage
IIK
input clamping current
IOK
output clamping current
IO
output current
Tj
junction temperature
Tstg
storage temperature
Ptot
total power dissipation
output in OFF-state or HIGH-state
VI < 0 V
VO < 0 V
output in LOW-state
Tamb = 40 C to +85 C
Min
0.5
1.2
0.5
18
50
-
[2]
-
65
[3]
-
Max Unit
+7.0 V
+7.0 V
+5.5 V
-
mA
-
mA
128 mA
150 C
+150 C
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
[3] SO14 packages: above 70 C Ptot derate linearly with 8 mW/K
SSOP14 and TSSOP14 packages: above 60 C Ptot derate linearly with 5.5 mW/K
DHVQFN14 packages: above 60 C Ptot derate linearly with 4.5 mW/K
74ABT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 25 November 2015
© Nexperia B.V. 2017. All rights reserved
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