L6219DSTR-T View Datasheet(PDF) - Allegro MicroSystems
Part Name
Description
Manufacturer
L6219DSTR-T Datasheet PDF : 8 Pages
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L6219DS
Dual Full-Bridge PWM Motor Driver
Applications Information
PWM Current Control
The L6219DS dual bridge is designed to drive both windings of
a bipolar stepper motor. Output current is sensed and controlled
independently in each bridge by an external sense resistor (RS),
internal comparator, and monostable multivibrator.
When the bridge is turned on, current increases in the motor
winding and it is sensed by the external sense resistor until
the sense voltage (VCOMPIN) reaches the level set at the
comparator’s input:
ITRIP = VREF/10 RS
The comparator then triggers the monostable which turns off
the source driver of the bridge. The actual load current peak
will be slightly higher than the trip point (especially for low-
inductance loads) because of the internal logic and switching
delays. This delay (td) is typically 2 μs. After turn-off, the
motor current decays, circulating through the ground-clamp
diode and sink transistor. The source driver’s off time (and
therefore the magnitude of the current decrease) is determined
by the monostable’s external RC timing components, where
toff = RTCT within the range of 20 kΩ to 100 kΩ and 100 pF to
1000 pF.
The fixed-off time should be short enough to keep the current
chopping above the audible range (< 46 μs) and long enough to
properly regulate the current. Because only slow-decay current
control is available, short off times (< 10 μs) require additional
efforts to ensure proper current regulation. Factors that can
negatively affect the ability to properly regulate the current
when using short off times include: higher motor-supply
voltage, light load, and longer than necessary blank time.
When the source driver is re-enabled, the winding current (the
sense voltage) is again allowed to rise to the comparator’s
threshold. This cycle repeats itself, maintaining the average
motor winding current at the desired level.
Loads with high distributed capacitances may result in high
turn-on current peaks. This peak (appearing across RS) will
attempt to trip the comparator, resulting in erroneous current
control or high-frequency oscillations. An external RCCC
time delay should be used to further delay the action of the
comparator. Depending on load type, many applications will
not require these external components (SENSE connected to
COMP IN).
PWM Output Current Wave Form
V PHAS E
+
I OUT 0
–
ITR IP
td
toff
Dwg. WM-003-1A
Load Current Paths
V
BB
BR IDGE ON
RS
SOUR CE OFF
ALL OFF
Dwg. E P -006-1
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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