AD2S1205WSTZ View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD2S1205WSTZ

12-Bit RDC with Reference Oscillator

Analog Devices 

AD2S1205

Pin No.

26

27

28

29

30

31

32

33

34

35

36, 42

37

38

39

40

41

43

44

Mnemonic

B

NM

DIR

DOS

LOT

FS1

FS2

RESET

EXC

EXC

AGND

Sin

SinLO

AVDD

CosLO

Cos

REFBYP

REFOUT

Description

Incremental Encoder Emulation Output B. Logic output. This output is free running and is valid if the resolver format

input signals applied to the converter are valid.

North Marker Incremental Encoder Emulation Output. Logic output. This output is free running and is valid if the

resolver format input signals applied to the converter are valid.

Direction. Logic output. This output is used in conjunction with the incremental encoder emulation outputs. The

DIR output indicates the direction of the input rotation and is high for increasing angular rotation.

Degradation of Signal. Logic output. Degradation of signal (DOS) is detected when either resolver input (Sin or Cos)

exceeds the specified DOS Sin/Cos threshold. See the Signal Degradation Detection section. DOS is indicated by a

logic low on the DOS pin and is not latched when the input signals exceed the maximum input level.

Loss of Tracking. Logic output. LOT is indicated by a logic low on the LOT pin and is not latched. See the Loss of

Signal Detection section.

Frequency Select 1. Logic input. FSI in conjunction with FS2 allows the frequency of EXC/EXC to be programmed.

Frequency Select 2. Logic input. FS2 in conjunction with FS1 allows the frequency of EXC/EXC to be programmed.

Reset. Logic input. The AD2S1205 requires an external reset signal to hold the RESET input low until VDD is within

the specified operating range of 4.5 V to 5.5 V. See the Supply Sequencing and Reset section.

Excitiation Frequency. Analog output. An on-board oscillator provides the sinusoidal excitation signal (EXC) and its

complement signal (EXC) to the resolver. The frequency of this reference signal is programmable via the FS1 and FS2 pins.

Excitation Frequency Complement. Analog output. An on-board oscillator provides the sinusoidal excitation signal

(EXC) and its complement signal (EXC) to the resolver. The frequency of this reference signal is programmable via

the FS1 and FS2 pins.

Analog Ground. These pins are ground reference points for analog circuitry on the AD2S1205. All analog input

signals and any external reference signal should be referred to this AGND voltage. Both of these pins should be

connected to the AGND plane of a system. The AGND and DGND voltages should ideally be at the same potential

and must not be more than 0.3 V apart, even on a transient basis.

Positive Analog Input of Differential Sin/SinLO Pair. The input range is 2.3 V p-p to 4.0 V p-p.

Negative Analog Input of Differential Sin/SinLO Pair. The input range is 2.3 V p-p to 4.0 V p-p.

Analog Supply Voltage, 4.75 V to 5.25 V. This pin is the supply voltage for all analog circuitry on the AD2S1205. The

AVDD and DVDD voltages ideally should be at the same potential and must not be more than 0.3 V apart, even on a

transient basis.

Negative Analog Input of Differential Cos/CosLO Pair.

Positive Analog Input of Differential Cos/CosLO Pair.

Reference Bypass. Reference decoupling capacitors should be connected here. Typical recommended values are

10 μF and 0.01 μF.

Voltage Reference Output, 2.39 V to 2.52 V.

Rev. A | Page 7 of 20

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