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M24128-BFMN6/B View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M24128-BFMN6/B Datasheet PDF : 34 Pages
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M24128, M24C64, M24C32
Signal description
2.3
2.3.1
2.3.2
2.3.3
Supply voltage (VCC)
Operating supply voltage VCC
Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage
within the specified [VCC(min), VCC(max)] range must be applied (see Table 9 and Table 10).
In order to secure a stable DC supply voltage, it is recommended to decouple the VCC line
with a suitable capacitor (usually of the order of 10nF to 100nF) close to the VCC/VSS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (tW).
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of VCC), the device does not respond to any
instruction until VCC has reached the Power On Reset threshold voltage (this threshold is
lower than the minimum VCC operating voltage defined in Table 9 and Table 10).
When VCC has passed the POR threshold, the device is reset and is in Standby Power
mode.
Power-down
At Power-down (continuous decrease of VCC), as soon as VCC drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in the Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
20
Maximum RP value versus bus parasitic capacitance (C) for an I2C bus
VCC
16
12
8
4
0
10
fc = 100kHz
fc = 400kHz
100
C (pF)
RP
SDA
MASTER
SCL
RP
C
1000
C
AI01665b
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