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M24128-BRBN5TG/B View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M24128-BRBN5TG/B
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M24128-BRBN5TG/B Datasheet PDF : 34 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Signal description
Figure 5. I2C bus protocol
SCL
SDA
START
Condition
SDA
Input
SDA
Change
M24128, M24C64, M24C32
STOP
Condition
SCL
SDA
1
2
3
MSB
START
Condition
7
8
9
ACK
SCL
1
2
3
7
8
9
SDA
MSB
ACK
STOP
Condition
AI00792B
Table 3.
Device select code
Device Type Identifier(1)
Chip Enable Address(2) RW
b7
b6
b5
b4
b3
b2
b1
b0
Device Select Code
1
0
1
0
E2
E1
E0
RW
1. The most significant bit, b7, is sent first.
2. E0, E1 and E2 are compared against the respective external pins on the memory device.
Table 4. Address most significant byte
b15
b14
b13
b12
b11
b10
b9
b8
Table 5. Address least significant byte
b7
b6
b5
b4
b3
b2
b1
b0
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