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FAN100(2010_01) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
FAN100 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AN-6067
APPLICATION NOTE
Introduction
This highly integrated PSR PWM controller contains several
features to enhance the performance of low-power flyback
converters. The patented topology of the PSR controller
allows for simplified of circuit designs, particularly battery
charger applications. CV and CC control can be accurately
achieved without secondary feedback circuitry. With the
addition of frequency-hopping in PWM operation, EMI
problems can be solved using minimized filter components.
As a result, a low-cost, smaller, and lighter charger is
produced when compared to a conventional design or a
linear transformer.
To minimize standby power consumption, the proprietary
green-mode function provides off-time modulation to
linearly decrease the PWM frequency under light-load
conditions. This green-mode function is designed to help the
power supply meet power conservation requirements. The
startup current is only 10µA, which allows for the use of
large startup resistance for further power savings.
The PSR controller also provides numerous protection
functions. The VDD pin is equipped with over-voltage
protection and under-voltage lockout. Pulse-by-pulse current
limiting and CC control ensure over-current protection
during heavy loads. The GATE output is clamped at 15V to
protect the external/internal MOSFET from over-voltage
damage. Additionally, the internal over-temperature-
protection function shuts down the controller with auto
recovery when over heating occurs.
By using the PSR controller, a charger can be implemented
with few external components and at a minimized cost.
Internal Block Operation
Constant Voltage Output Regulation
PSR controller’s innovative method can achieve accurate
output CV/CC characteristic without voltage and current
sensing circuitry on the secondary side. The application
circuit and a conceptualized internal block diagram relating
to the constant voltage regulation are shown in Figure 11,
and the key waveform is shown in Figure 12. The secondary
output status is taken from the primary auxiliary winding
when the MOSFET is off. A unique sampling method is
used to acquire a duplication of the output voltage (Vsah) and
the output diode discharge time (tdis). The sampled voltage
(Vsah) is then compared with the precise internal reference
voltage (Vref) to determine the on-time of the MOSFET by
modulating error amplifier’s output. This inexpensive
method achieves accurate output voltage regulation.
Naux
R1
Vref
VS
S/H
Vsah
PWM
R2
CS
COMV
Vin
iS
IO
+
Npri
Nsec
VO
CO RO
n :1
iP
RS
Figure 11. Internal Block of Constant Voltage Output Operation
© 2008 Fairchild Semiconductor Corporation
Rev. 1.0.1 • 1/26/10
5
www.fairchildsemi.com
 

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