EtronTech
1M x 16 SDRAM
EM636165
Recommended D.C. Operating Conditions (VDD = 3.3V ± 0.3V, Ta = 0~70°C)
Description/Test condition
Operating Current
1 bank
tRC ≥ tRC(min), Outputs Open, Input operation
signal one transition per one cycle
Precharge Standby Current in non-power down mode
tCK = tCK(min), CS# ≥ VIH, CKE = VIH
Input signals are changed once during 30ns.
Precharge Standby Current in power down mode
tCK = tCK(min), CKE ≤ VIL(max)
Symbol
- 5/55/6/7/8/10
Max.
130/125/115/100/95/85
IDD1
IDD2N
IDD2P
115/110/90/85/75/60
2
- 7L
Unit
40
15
0.8
Note
3
3
3
Precharge Standby Current in power down mode
tCK = ∞,CKE ≤ VIL(max)
IDD2PS
2
0.8
mA
Active Standby Current in power down mode
CKE ≤ VIL(max), tCK = tCK(min)
IDD3P
2
1.5
3
Active Standby Current in non-power down mode
CKE ≥ VIL(max), tCK = tCK(min)
IDD3N
105/100/90/80/70/55
20
Operating Current (Burst mode)
tCK=tCK(min), Outputs Open, Multi-bank interleave,gapless
IDD4
165/160/150/140/130/115 40
3, 4
data
Refresh Current
tRC ≥ tRC(min)
IDD5
115/110/100/90/90 /80 40
3
Self Refresh Current
VIH ≥ VDD - 0.2, 0V ≤ VIL ≤ 0.2V
IDD6
2
0.6
Parameter
IIL
IOL
VOH
VOL
Description
Input Leakage Current
( 0V ≤ VIN ≤ VDD, All other pins not under test = 0V )
Output Leakage Current
Output disable, 0V ≤ VOUT ≤ VDDQ)
LVTTL Output "H" Level Voltage
( IOUT = -2mA )
LVTTL Output "L" Level Voltage
( IOUT = 2mA )
Min.
- 10
- 10
2.4
-
Max.
10
Unit Note
µA
10
µA
-
V
0.4
V
Preliminary
19
Rev. 2.7 Mar. 2006