NXP Semiconductors
12. Waveforms
74AHC1G08-Q100; 74AHCT1G08-Q100
2-input AND gate
A, B input
Y output
VM
tPHL
VM
Measurement points are given in Table 9.
Fig 5. Input (A and B) to output (Y) propagation delays
Table 9. Measurement point
Type
Input
74AHC1G08-Q100
74AHCT1G08-Q100
VI
GND to VCC
GND to 3.0 V
VM
0.5 VCC
1.5 V
tPLH
mna116
Output
VM
0.5 VCC
0.5 VCC
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
CL
mna101
Test data is given in Table 8. Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 6. Load circuitry for switching times
74AHC_AHCT1G08_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 July 2012
© NXP B.V. 2012. All rights reserved.
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