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LF13201M Просмотр технического описания (PDF) - National ->Texas Instruments

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LF13201M Quad SPST JFET Analog Switches NSC
National ->Texas Instruments NSC
LF13201M Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Application Hints (Continued)
The drain and source leakage currents, in both the ON and
the OFF states of each switch, are typically less than 1 nA at
25˚C and less than 100 nA at 125˚C. As shown in the typical
curves, these leakage currents are Dependent on power
supply voltages, analog voltage, analog current and the
source to drain voltage.
The delay time OFF (tOFF) is essentially independent of both
the analog voltage and temperature. The delay time ON
(tON) will decrease as either (VCC−VA) decreases or the tem-
perature decreases.
The voltage between the positive supply (VCC) and either the
negative supply (VEE) or the reference supply (VR) can be as
much as 36V. To accommodate variations in input logic refer-
ence voltages, VR can range from VEE to (VCC−4.5V). Care
should be taken to ensure that the power supply leads for the
device never become reversed in polarity or that the device
is never inadvertently installed backwards in a test socket. If
one of these conditions occurs, the supplies would zener an
internal diode to an unlimited current; and result in a de-
stroyed device.
When a switch is turned OFF or ON, transients will appear at
the load due to the internal transient voltage at the gate of
the switch JFET being coupled to the drain and source by
the junction capacitances of the JFET. The magnitude of
these transients is dependent on the load. A lower value RL
produces a lower transient voltage. A negative transient oc-
curs during the delay time ON, while a positive transient oc-
curs during the delay time OFF. These transients are rela-
tively small when compared to faster switch families.
This node can be used, as shown in Figure 5, to turn all the
switches in the unit off independent of logic inputs. Normally,
the node floats freely at an internal diode drop (0.7V) above
VR. When the external transistor in Figure 5 is saturated, the
node is pulled very close to VR and the unit is disabled. Typi-
cally, the current from the node will be less than 1 mA. This
feature is not available on the LF11201 or LF11202 series.
Typical Applications
FIGURE 5. Disable Function
Sample and Hold with Reset
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