Double ESD protection diodes for transient overvoltage suppression
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the devices as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
9. Test information
9.1 Quality information
This product has been qualiﬁed in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualiﬁcation for discrete semiconductors, and is
suitable for use in automotive applications.
10. Package outline
Dimensions in mm
Fig 10. Package outline SOT23 (TO-236AB)
Product data sheet
Rev. 01 — 1 September 2008
© NXP B.V. 2008. All rights reserved.
10 of 15