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4N46-500 View Datasheet(PDF) - Avago Technologies

Part Name
Description
Manufacturer
4N46-500
Avagotech
Avago Technologies Avagotech
4N46-500 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
4N45/4N46
High Gain Darlington Output Optocouplers
Data Sheet
Description
The 4N45/46 optocouplers contain a GaAsP light
emitting diode optically coupled to a high gain
photodetector IC.
The excellent performance over temperature results
from the inclusion of an integrated emitter-base
bypass resistor which shunts photodiode and first
stage leakage currents as well as bleeding off excess
base drive to ground. External access to the second
stage base provides the capability for better noise
rejection than a conventional photodarlington
detector. An external resistor or capacitor at the
base can be added to make a gain-bandwidth or input
current threshold adjustment. The base lead can also
be used for feedback.
The high current transfer ratio at very low input
currents permits circuit designs in which adequate
margin can be allowed for the effects of optical
coupling variations.
The 4N46 has a 350% minimum CTR at an input
current of only 0.5 mA making it ideal for use in low
input current applications such as MOS, CMOS and
low power logic interfacing. Compatibility with high
voltage CMOS logic systems is assured by the 20 V
minimum breakdown voltage of the output transistor
and by the guaranteed maximum output leakage
(IOH) at 18 V.
The 4N45 has a 250% minimum CTR at 1.0 mA input
current and a 7 V minimum breakdown voltage
rating.
Selection for lower input current down to 250 µA is
available upon request.
Features
• High current transfer ratio – 1500% typical
• Low input current requirement – 0.5 mA
• Performance guaranteed over 0°C to 70°C temperature
range
• Internal base-emitter resistor minimizes output
leakage
• Gain-bandwidth adjustment pin
• Safety approval
UL Recognized -3750 V rms for 1 minute
CSA Approved IEC/EN/DIN EN 60747-5-2
Applications
• Telephone ring detector
• Digital logic ground isolation
• Low input current line receiver
• Line voltage status indicator–low input power
dissipation
• Logic to read relay interface
• Level shifting
• Interface between logic families
Functional Diagram
ANODE 1
CATHODE 2
6 VB
5 VO
TRUTH TABLE
(POSITIVE LOGIC)
LED OUTPUT
ON
L
OFF
H
3
4 GND
* JEDEC Registered Data
** JEDEC Registered up to
70°C.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
 

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