MC145162D View Datasheet(PDF) - LANSDALE Semiconductor Inc.

Part Name

Description

Manufacturer

MC145162D

60 MHz and 85 MHz Universal Programmable Dual PLL Frequency Synthesizers CMOS

LANSDALE Semiconductor Inc. 

ML145162

LANSDALE Semiconductor, Inc.

CONTROL REGISTER IDENTIFIER = 1

CONTROL REGISTER DATA

Din

1

MSB

0

TEST

BIT

AUX

DATA

SELECT

REF

OUT

3/ 4

TxPD

ENABLE

RxPD

ENABLE

REF PD

ENABLE

LSB

CLK

ENB

NOTE: ENB must be high during the serial transfer.

Figure 8. Programming Format of the Control Register

Table 1. Control Register Function Bits Description

Test Bit

Set to 1 for Tx/Rx channel counter test mode

Set to 0 for normal application

Aux Data Select

REFout 3 / 4

TxPD Enable

RxPD Enable

Ref PD Enable

Set to 1 for both ADin and Din pins inputting the transmit 16–bits data and receive 16–bits data

respectively.

Set to 0 for normal application interfacing with MCU serial peripheral interface. Does not use ADin pin;

tie ADin to VSS.

If set to 1, REFout output frequency is equal to OSCout 3.

If set to 0, REFout output is OSCout 4.

If set to 1, the transmit counter, transmit phase detector, and the associated circuitry is in power–

down mode.

Tx PS/fTx is set “High”.

If set to 1, the receive counter, receive phase detector, and the associated circuitry is in power–

down mode.

Rx PS/fRx is set “High”.

If set to 1, both 12–bit and 14–bit reference frequency counters are in power–down mode.

TxPD

Enable

0

0

0

0

1

1

1

1

RxPD

Enable

0

0

1

1

0

0

1

1

Table 2. Control Register Power Down Bits Function

REF PD

Enable

Tx–Channel Counter Rx–Channel Counter

0

—

—

1

—

—

0

—

Power Down

1

—

Power Down

0

Power Down

—

1

Power Down

—

0

Power Down

Power Down

1

Power Down

Power Down

Reference

Frequency Counter

—

Power Down

—

Power Down

—

Power Down

—

Power Down

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