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74AHC2G241DP-Q100 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74AHC2G241DP-Q100
NXP
NXP Semiconductors. NXP
74AHC2G241DP-Q100 Datasheet PDF : 16 Pages
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NXP Semiconductors
74AHC2G241-Q100; 74AHCT2G241-Q100
Dual buffer/line driver; 3-state
Table 8. Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure 7.
Symbol Parameter Conditions
tdis
disable time 1OE to 1Y; see Figure 5
VCC = 4.5 V to 5.5 V
CL = 15 pF
CL = 50 pF
2OE to 2Y; see Figure 6
VCC = 4.5 V to 5.5 V
CL = 15 pF
CL = 50 pF
CPD
power
per buffer;
dissipation CL = 50 pF; fi = 1 MHz;
capacitance VI = GND to VCC
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min
Max
Min
Max
[1]
[3]
- 4.5 6.8 1.0
8.0
1.0
8.5 ns
- 6.1 8.8 1.0
10.0
1.0
11.0 ns
[1]
[3]
- 4.0 6.8 1.0
8.0
1.0
8.5 ns
- 5.7 8.8 1.0
10.0
1.0
11.0 ns
[4] -
10
-
-
-
-
-
pF
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD (W).
PD = CPD VCC2 fi + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V.
12. Waveforms and test circuit
9,
Q$LQSXW
*1'
92+
Q<RXWSXW
92/
90
W3+/
90
W3/+
PQD
Fig 4.
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
The input (nA) to output (nY) propagation delays
74AHC_AHCT2G241_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 12 November 2013
© NXP B.V. 2013. All rights reserved.
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