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M16C/6N View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part NameDescriptionManufacturer
M16C/6N SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Mitsubishi
MITSUBISHI ELECTRIC  Mitsubishi
M16C/6N Datasheet PDF : 262 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Memory
Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Operation of Functional Blocks
The M16C/6N group accommodates several units in a single chip. These units include ROM and RAM to
store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations. Also
included are peripheral units such as CAN module, timers, serial I/O, D-A converter, DMAC, CRC calculation
circuit, A-D converter, and I/O ports.
Each unit is explained in the following.
Memory
Figure 2-1 depicts the memory map of the M16C/6N group. The address space extends the 1M bytes from
address 0000016 to FFFFF16. ROM is located from FFFFF16 down. For example, in the M306N0MCT-
XXXFP, there is 128K byte of internal ROM from E000016 to FFFFF16. The vector table for fixed interrupts
such as the reset and NMI are mapped to FFFDC16 to FFFFF16. The starting addresses of the interrupt
routines are stored here. The address of the vector table for timer interrupts, etc., can be set as desired using
the internal register (INTB). See the section on interrupts for details.
RAM is located from 0040016 up. For example, in the M306N0MCT-XXXFP, 5K bytes of internal RAM are
mapped to the space from 0040016 to 017FF16. In addition to storing data, the RAM also stores the stack
used when calling subroutines and when interrupts are generated.
The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, CAN controller and timers, etc. Figure 2-2 to 2-9 are
locations of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and
cannot be used for other purposes.
The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines or
the destination addresses of jumps are stored here, subroutine call instructions and jump instructions can be
implemented as 2-byte instructions, reducing the number of program steps.
In memory expansion mode and microprocessor mode, a part of the space is reserved and cannot be used.
For example, in the M306N0MCT-XXXFP, the following space cannot be used.
• The space between 0180016 and 03FFF16 (Memory expansion and microprocessor modes)
• The space between D000016 and DFFFF16 (Memory expansion mode)
0000016
0040016
SFR area
FFE0016
Internal RAM area
XXXXX16
0400016
Internal reserved
area (Note 1)
Special page
vector table
External area
D000016
YYYYY16
Internal reserved
area (Note 2)
Internal ROM area
FFFFF16
FFFDC16
FFFFF16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
Type No. Address XXXXX16 Address YYYYY16
M306N0MC
017FF16
E000016
Note 1: During memory expansion and microprocessor modes, can not be used.
M306N0FG
02BFF16
C000016
Note 2: In memory expansion mode, can not be used.
Figure 2-1. Memory map
9
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