ST90158 - REGISTER AND MEMORY MAP
3 REGISTER AND MEMORY MAP
3.1 MEMORY CONFIGURATION
The Program memory space of the ST90135/158,
0/16/24/32/48/64/K bytes of directly addressable
on-chip memory, is fully available to the user.
The first 256 memory locations from address 0 to
FFh hold the Reset Vector, the Top-Level (Pseudo
Non-Maskable) interrupt, the Divide by Zero Trap
Routine vector and, optionally, the interrupt vector
table for use with the on-chip peripherals and the
external interrupt sources. Apart from this case no
other part of the Program memory has a predeter-
mined function except segment 21h which is re-
served for use by STMicroelectronics.
3.2 EPROM PROGRAMMING
The 65536 bytes of EPROM memory of the
ST90E158 may be programmed by using the
EPROM Programming Boards (EPB) or gang pro-
grammers available from STMicroelectronics.
The EPROM of the windowed package of the
ST90E158 may be erased by exposure to Ultra-Vi-
The erasure characteristic of the ST90E158 is
such that erasure begins when the memory is ex-
posed to light with a wave lengths shorter than ap-
proximately 4000Å. It should be noted that sunlight
and some types of fluorescent lamps have wave-
lengths in the range 3000-4000Å. It is thus recom-
mended that the window of the ST90E158 packag-
es be covered by an opaque label to prevent unin-
tentional erasure problems when testing the appli-
cation in such an environment.
The recommended erasure procedure of the
EPROM is the exposure to short wave ultraviolet
light which have a wave-length 2537Å. The inte-
grated dose (i.e. U.V. intensity x exposure time) for
erasure should be a minimum of 15W-sec/cm2.
The erasure time with this dosage is approximate-
ly 30 minutes using an ultraviolet lamp with
12000mW/cm2 power rating. The ST90E158
should be placed within 2.5cm (1 inch) of the lamp
tubes during erasure.
Table 5. First 6 Bytes of Program Space
0 Address high of Power on Reset routine
1 Address low of Power on Reset routine
2 Address high of Divide by zero trap Subroutine
3 Address low of Divide by zero trap Subroutine
4 Address high of Top Level Interrupt routine
5 Address low of Top Level Interrupt routine