ADCMP600BRJZ-REEL7 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADCMP600BRJZ-REEL7

Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators

Analog Devices 

OPTIMIZING PERFORMANCE

As with any high speed comparator, proper design and layout

techniques are essential for obtaining the specified performance.

Stray capacitance, inductance, inductive power and ground

impedances, or other layout issues can severely limit performance

and often cause oscillation. Large discontinuities along input

and output transmission lines can also limit the specified pulse-

width dispersion performance. The source impedance should

be minimized as much as is practicable. High source impedance,

in combination with the parasitic input capacitance of the

comparator, causes an undesirable degradation in bandwidth at

the input, thus degrading the overall response. Thermal noise

from large resistances can easily cause extra jitter with slowly

slewing input signals; higher impedances encourage undesired

coupling.

COMPARATOR PROPAGATION DELAY

DISPERSION

The ADCMP600/ADCMP601/ADCMP602 comparators are

designed to reduce propagation delay dispersion over a wide

input overdrive range. Propagation delay dispersion is the

variation in propagation delay that results from a change in the

degree of overdrive or slew rate (that is, how far or how fast the

input signal exceeds the switching threshold).

Propagation delay dispersion is a specification that becomes

important in high speed, time-critical applications, such as data

communication, automatic test and measurement, and instru-

mentation. It is also important in event-driven applications, such

as pulse spectroscopy, nuclear instrumentation, and medical

imaging. Dispersion is defined as the variation in propagation

delay as the input overdrive conditions are changed (Figure 18

and Figure 19).

The device dispersion is typically < 2 ns as the overdrive varies

from 10 mV to 125 mV. This specification applies to both

positive and negative signals because the device has very closely

matched delays both positive-going and negative-going inputs.

500mV OVERDRIVE

INPUT VOLTAGE

10mV OVERDRIVE

VN ± VOS

Q/Q OUTPUT

DISPERSION

Figure 18. Propagation Delay—Overdrive Dispersion

ADCMP600/ADCMP601/ADCMP602

INPUT VOLTAGE

1V/ns

10V/ns

VN ± VOS

Q/Q OUTPUT

DISPERSION

Figure 19. Propagation Delay—Slew Rate Dispersion

COMPARATOR HYSTERESIS

The addition of hysteresis to a comparator is often desirable in a

noisy environment, or when the differential input amplitudes

are relatively small or slow moving. Figure 20 shows the transfer

function for a comparator with hysteresis. As the input voltage

approaches the threshold (0.0 V, in this example) from below

the threshold region in a positive direction, the comparator

switches from low to high when the input crosses +VH/2, and the

new switching threshold becomes −VH/2. The comparator remains

in the high state until the new threshold, −VH/2, is crossed from

below the threshold region in a negative direction. In this manner,

noise or feedback output signals centered on 0.0 V input cannot

cause the comparator to switch states unless it exceeds the region

bounded by ±VH/2.

OUTPUT

VOH

VOL

0

–VH

2

INPUT

+VH

2

Figure 20. Comparator Hysteresis Transfer Function

The customary technique for introducing hysteresis into a

comparator uses positive feedback from the output back to the

input. One limitation of this approach is that the amount of

hysteresis varies with the output logic levels, resulting in

hysteresis that is not symmetric about the threshold. The

external feedback network can also introduce significant

parasitics that reduce high speed performance and induce

oscillation in some cases.

These ADCMP600 features a fixed hysteresis of approximately

2 mV. The ADCMP601 and ADCMP602 comparators offer a

programmable Hysteresis feature that can significantly improve

accuracy and stability. Connecting an external pull-down

resistor or a current source from the LE/HYS pin to GND,

varies the amount of hysteresis in a predictable, stable manner.

Rev. A | Page 11 of 16

Share Link: