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ADDS-21535-EZLITE データシートの表示(PDF) - Analog Devices

部品番号ADDS-21535-EZLITE ADI
Analog Devices ADI
コンポーネント説明1 MSPS 16-/14-Bit Analog I/O Port
ADDS-21535-EZLITE Datasheet PDF : 44 Pages
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AD15700
ADC DEFINITION OF SPECIFICATIONS
Integral Nonlinearity Error (INL)
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” through “positive
full scale.” The point used as negative full scale occurs 1/2 LSB
before the first code transition. Positive full scale is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each code to the true straight line.
Differential Nonlinearity Error (DNL)
In an ideal ADC, code transitions are 1 LSB apart. Differential
nonlinearity is the maximum deviation from this ideal value.
It is often specified in terms of resolution for which no missing
codes are guaranteed.
Full-Scale Error
The last transition (from 011...10 to 011...11 in twos comple-
ment coding) should occur for an analog voltage 1 1/2 LSB
below the nominal full scale (2.499886 V for the ± 2.5 V range).
The full-scale error is the deviation of the actual level of the last
transition from the ideal level.
Bipolar Zero Error
The difference between the ideal midscale input voltage (0 V)
and the actual voltage producing the midscale output code.
Unipolar Zero Error
In unipolar mode, the first transition should occur at a level
1/2 LSB above analog ground. The unipolar zero error is the
deviation of the actual transition from that point.
Spurious Free Dynamic Range (SFDR)
The difference, in decibels (dB), between the rms amplitude of
the input signal and the peak spurious signal.
Effective Number of Bits (ENOB)
A measurement of the resolution with a sine wave input. It is
related to S/(N + D) by the following formula:
(( ) ) [ ] ENOB = S / N + D dB – 1.76 / 6.02
and is expressed in bits.
Total Harmonic Distortion (THD)
The rms sum of the first five harmonic components to the rms
value of a full-scale input signal; expressed in decibels.
Signal-to-Noise Ratio (SNR)
The ratio of the rms value of the actual input signal to the rms
sum of all other spectral components below the Nyquist frequency,
excluding harmonics and dc. The value for SNR is expressed in
decibels.
Signal-to-(Noise + Distortion)
Ratio (S/[N + D])
The ratio of the rms value of the actual input signal to the rms
sum of all other spectral components below the Nyquist frequency,
including harmonics but excluding dc. The value for S/(N + D)
is expressed in decibels.
Aperture Delay
A measure of the acquisition performance, measured from the
falling edge of the CNVST input to when the input signal is
held for a conversion.
Transient Response
The time required for the ADC to achieve its rated accuracy
after a full-scale step function is applied to its input.
DAC DEFINITION OF SPECIFICATIONS
Relative Accuracy
For the DAC, relative accuracy or integral nonlinearity (INL)
is a measure of the maximum deviation in LSBs from a straight
line passing through the endpoints of the DAC transfer function.
A typical INL versus code plot can be seen in TPC 16.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ± 1 LSB maximum
ensures monotonicity. TPC 19 illustrates a typical DNL versus
code plot.
Gain Error
Gain error is the difference between the actual and ideal analog
output range, expressed as a percent of the full-scale range. It is
the deviation in slope of the DAC transfer characteristic from ideal.
Gain Error Temperature Coefficient
This is a measure of the change in gain error with changes in
temperature. It is expressed in ppm/C.
Zero Code Error
Zero code error is a measure of the output error when zero code
is loaded to the DAC register.
Zero Code Temperature Coefficient
This is a measure of the change in zero code error with a change
in temperature. It is expressed in mV/C.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV–s
and is measured when the digital input code is changed by 1 LSB
at the major carry transition. A plot of the glitch impulse is shown
in Figure 28.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into the
analog output of the DAC from the digital inputs of the DAC, but
is measured when the DAC output is not updated. CS_DAC is
held high, while the CLK and DIN signals are toggled. It is
specified in nV–s and is measured with a full-scale code change
on the data bus, i.e., from all 0s to all 1s and vice versa. A typical
plot of digital feedthrough is shown in Figure 27.
Power Supply Rejection Ratio
This specification indicates how the output of the DAC is affected
by changes in the power supply voltage. Power supply rejection
ratio is quoted in terms of percent change in output per percent
change in VDD for full-scale output of the DAC. VDD is varied
by ± 10%.
Reference Feedthrough
This is a measure of the feedthrough from the VREF input to the
DAC output when the DAC is loaded with all 0s. A 100 kHz,
1 V p-p is applied to VREF. Reference feedthrough is expressed
in mV p-p.
–14–
REV. A
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