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MTV112AV View Datasheet(PDF) - Myson Century Inc

Part Name
Description
Manufacturer
MTV112AV Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MYSON
TECHNOLOGY
MTV112A
(Rev 1.9)
Hor.
D
C
E
B
A
R
Vert.
Q
S
P
O
MTV112A Self-Test Pattern Timing (8MHz)
Hor. Total Time
Hor. Acitve Time
Hor. F. P.
SYNC Pulse Width
Hor. B. P.
63.5KHz, 60Hz
Absolute time
H dots
Us(A)=15.75
1280
Us(D)=12.05
979.3
Us(E)=0.2
16.25
Us(B)=1.5
122
Us(C)=2
162.54
31.7KHz, 60Hz
Absolute time
H dots
Us(A)=31.5
640
Us(D)=24.05
488.6
Us(E)=0.45
9
Us(B)=3
61
Us(C)=4
81.27
Hor. Total Time
Hor. Active Time
Hor. F. P.
SYNC Pulse Width
Hor. B. P.
V lines
Us(O)=16.6635
Us(R)=15.6555
Us(S)=0.063
Us(P)=0.063
Us(Q)=0.882
1024
962
3.87
3.87
54.2
V lines
Us(O)=16.6635
480
Us(R)=15.6555
451
Us(S)=0.063
1.82
Us(P)=0.063
1.82
Us(Q)=0.882
25.4
* 8 x 8 blocks of cross-hatch pattern in display region.
4.7 VSYNC Interrupt
MTV112A checks the VSYNC input pulse and generates an interrupt at its leading edge. The VSYNC1 flag
is set each time MTV112A detects a VSYNC pulse.
4.8 H/V SYNC Processor Register
reg name
PSTUS
HCNTH
HCNTL
VCNTH
VCNTL
PCTR0
PCTR2
PCTR3
P4OUT
addr
40h (r)
41h (r)
42h (r)
43h (r)
44h (r)
40h (w)
42h (w)
43h (w)
44h (w)
bit7
CVpre
Hovf
HF7
Vovf
VF7
C1
X
ENCLP
X
bit6
X
X
HF6
X
VF6
C0
X
CLPEG
X
bit5
Hpol
X
HF5
X
VF5
HVsel
X
CLPPO
X
bit4
Vpol
X
HF4
X
VF4
STOsel
Selft
CLPW2
P44
bit3
Hpre
X
HF3
X
VF3
PREFS
STbsh
CLPW1
P43
bit2 bit1
Vpre Hoff
HF10 HF9
HF2 HF1
X
X
VF2 VF1
HALFV HBpl
Rt1
Rt0
CLPW0 EHALFV
P42
P41
bit0
Voff
HF8
HF0
VF8
VF0
VBpl
STF
EHALFH
P40
MTV112A Revision 1.9 05/18/2001
9/20
 

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