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MTV112MS32 View Datasheet(PDF) - Myson Century Inc

Part Name
Description
Manufacturer
MTV112MS32 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MYSON
TECHNOLOGY
MTV112M
(Rev 2.0)
8051 Embedded CRT Monitor Controller
Flash Version
FEATURES
l 8051 core.
l 384-bytes internal RAM.
l 32K-bytes program Flash ROM.
l 14-channels 5V open-drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin.
l 28 bi-direction I/O pin,12 dedicated pin,12 shared with DAC, 4 shared with DDC/IIC interface.
l 3-output pin shared with H/V sync output and self test output pins.
l SYNC processor for composite separation, polarity and frequency check, and polarity adjustment.
l Built-in monitor self-test pattern generator.
l Built-in low power reset circuit.
l One slave mode IIC interface and one master mode IIC interface.
l IIC interface for DDC1/DDC2B and EEPROM, only one EEPROM needed to store DDC1/DDC2B and
display mode information.
l Dual 4-bit ADC or 4 channel 6-bit ADC.
l Watchdog timer with programmable interval.
l 40-pin PDIP and 44-pin PLCC package.
GENERAL DESCRIPTION
The MTV112M micro-controller is an 8051 CPU core embedded device specially tailored to CRT monitor
applications. It includes an 8051 CPU core, 384-byte SRAM, 14 built-in PWM DACs, DDC1/DDC2B interface,
24Cxx series EEPROM interface, A/D converter and a 32K bytes internal program Flash ROM.
BLOCK DIAGRAM
P1.0-7
P0.0-7
RD
X1
WR
8051
X2 CORE INT
1
P2.0-3
RST
P3.0-P3.2 P3.4 P2.4-7
P0.0-7
RD
WR
XFR
WATCH-DOG
TIMER
RST
STOUT
HSYNC
H / VSYNC VSYNC
CONTROL HBLANK
VBLANK
14 CHANNEL DA0-9
PWM DAC
DA10-13
ADC
AD0
AD1
HSCL
HSDA
DDC 1/2 B & FIFO
INTERFACE
ISCL
IIC INTERFACE
ISDA
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Revision 2.0
-1-
2001/05/18
 

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