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ML12011-5P View Datasheet(PDF) - LANSDALE Semiconductor Inc.

Part Name
Description
Manufacturer
ML12011-5P
LANSDALE
LANSDALE Semiconductor Inc. LANSDALE
ML12011-5P Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ML12009
ML12011
MECL PLL Components Dual
Modulus Prescaler
Legacy Device: Motorola MC12009, MC12011
These devices are two–modulus prescalers which will divide by
5 and 6, 8 and 9, respectively. A MECL–to–MTTL translator is
provided to interface directly with the Motorola MC12014
Counter Control Logic. In addition, there is a buffered clock input
and MECL bias voltage source.
• ML12009 480 MHz (÷5/6), ML12011 550 MHz (÷8/9)
• MECL to MTTL Translator on Chip
• MECL and MTTL Enable Inputs
• 5.0 or –5.2 V Operation*
• Buffered Clock Input — Series Input RC Typ, 20 and 4.0 pF
• VBB Reference Voltage
• 310 mW (Typ)
* When using a 5.0 V supply, apply 5.0 V to Pin 1 (VCCO),
Pin 6 (MTTL VCC), Pin 16 (VCC), and ground Pin 8
(VEE). When using –5.2 V supply, ground Pin 1 (VCCO),
Pin 6 (MTTL VCC), and Pin 16 (VCC) and apply –5.2 V to
Pin 8 (VEE). If the translator is not required, Pin 6 may be
left open to conserve DC power drain.
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
(Ratings above which device life may be impaired)
Power Supply Voltage
(VCC = 0)
VEE
–8.0
Vdc
Input Voltage
(VCC = 0)
Output Source Current
Continuous
Surge
Vin
0 to VEE
Vdc
IO
mAdc
50
100
Storage Temperature Range
Tstg
–65 to 175
°C
(Recommended Maximum Ratings above which performance may be
degraded)
Operating Temperature Range
ML12009, ML12011
TA
–30 to 85
°C
DC Fan–Out (Note 1)
(Gates and Flip–Flops)
n
70
NOTES: 1. AC fan–out is limited by desired system performance.
16
1
SO 16 = -5P
PLASTIC PACKAGE
CASE 751B
16
1
P DIP 16 = EP
PLASTIC PACKAGE
CASE 648
CROSS REFERENCE/ORDERING INFORMATION
PACKAGE
MOTOROLA
LANSDALE
P DIP 16
SOIC 16
P DIP 16
SO 16W
MC12009P
MC12009D
MC12011P
MC12011D
ML12009EP
ML12009-5P
ML12011EP
ML12011-5P
Note: Lansdale lead free (Pb) product, as it
becomes available, will be identified by a part
number prefix change from ML to MLE.
PIN CONNECTIONS
VCCO 1
Q2
Q3
(–) 4
(+) 5
MTTL VCC 6
MTTL Output 7
VEE 8
16 VCC
15 Clock
14 VBB
13 E1 MECL
12 E2 MECL
11 E3 MECL
10 E4 MECL
9 E5 MECL
(Top View)
Page 1 of 14
www.lansdale.com
Issue A
 

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