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FM25D04C-1ACA3T Просмотр технического описания (PDF) - FIDELIX

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FM25D04C-1ACA3T 32M-BIT Serial Flash Memory with 4KB Sectors, Dual and QuadI/O SPI FIDELIX
FIDELIX FIDELIX
FM25D04C-1ACA3T Datasheet PDF : 61 Pages
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FM25Q32
11.2.30 Write Security Register (2Fh)
The Write Security Register instruction is for changing the values of Security Register bits. Unlike
Write Status Register, the WREN instruction is not required before writing WRSCUR instruction.
The WRSCUR instruction may change the value of bit1 (LDSO bit) for customer to lock-down the
4K-bit Secured OTP area. Once the LDSO bit is set to “1”, the Secured OTP area cannot be
updated any more.
The /CS must go high exactly at the boundary; otherwise, the instruction will be rejected and not
executed.
/ CS
Mode 3
CLK Mode 0
DI
DO
0 1 2 3 4 5 6 7 Mode 3
Mode 0
Instruction (2 Fh )
High Impedance
Figure 30. Write Security Register instruction sequence
11.2.31 4K-bit Secured OTP
It’s for unique identifier to provide 4K-bit one-time-program area for setting device unique serial
number which may be set by factory or system customer. Please refer to table of “4K-bit secured
OTP definition”.
- Security register bit 0 indicates whether the chip is locked by factory or not.
- To program the 4K-bit secured OTP by entering 4K-bit secured OTP mode (with ENSO
command) and going through normal program procedure, and then exiting 4K-bit secured OTP
mode by writing EXSO command
- Customer may lock-down bit1 as “1”. Please refer to “table of security register definition” for
security register bit definition and table of “4K-bit secured OTP definition” for address range
definition.
- Note. Once lock-down whatever by factory or customer, it cannot be changed any more. While
in 4K-bit secured OTP mode, array access is not allowed to write.
4K-bit secured OTP definition
Address range
Size
000000 ~ 00000F
000010 ~ 0001FF
128-bit
3968-bit
Standard
Factory Lock
ESN
(Electrical Serial Number)
N/A
Customer Lock
Determined by customer
preliminary(Aug.18.2010) 47
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