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FM25D04C-1ACB2R Просмотр технического описания (PDF) - FIDELIX

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FM25D04C-1ACB2R 32M-BIT Serial Flash Memory with 4KB Sectors, Dual and QuadI/O SPI FIDELIX
FIDELIX FIDELIX
FM25D04C-1ACB2R Datasheet PDF : 61 Pages
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FM25Q32
instruction is the same as previously described, and shown in figure 23b, except that after /CS is
driven high it must remain high for a time duration of tRES2 (See AC Characteristics). After this
time duration the device will resume normal operation and other instructions will be accepted. If
the Release from power-down /Device ID instruction is issued while an Erase, Program or Write
cycle is in process (when BUSY equals 1) the instruction is ignored and will not have any effects
on the current cycle.
/CS
Mode 3
CLK
Mode 0
DI
DO
01 234 567
Instruction (ABh)
High Impedance
tRES1
Mode 3
Mode 0
Power Down Current
Stand-by Current
Figure 23a. Release power-down Instruction Sequence
/ CS
Mode 3
CLK Mode 0
DI
* = MSB
**
0 1 2 3 4 5 6 7 8 9 10
Mode 3
28 29 30 31 32 33 34 35 36 37 38
Mode 0
Instruction (ABh)
3 Dummy Bytes
tRES2
23 22 21
*
High Impedance
3 210
Device ID **
765 432 10
*
Power Down Current
Stand-by Current
Figure 23b. Release power-down / Device ID Instruction Sequence Diagram
preliminary(Aug.18.2010) 39
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