FM25D04B-85IA6Y View Datasheet(PDF) - FIDELIX

Part Name

Description

Manufacturer

FM25D04B-85IA6Y

32M-BIT Serial Flash Memory with 4KB Sectors, Dual and QuadI/O SPI

FIDELIX 

FM25Q32

11.2.16 Sector Erase (20h)

The sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased

state of all 1s (FFh). A Write Enable instruction must be executed before the device will accept the

Sector Erase Instruction (Status Register bit WEL must equal 1). The instruction is initiated by

driving the /CS pin low and shifting the instruction code “20h” followed a 24-bit sector address

(A23-A0). The Sector Erase instruction sequence is shown in figure 16.

The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not

done the Sector Erase instruction will not be executed. After /CS is driven high, the self-timed

Sector Erase instruction will commence for a time duration of tSE (See AC Characteristics). While

the Sector Erase cycle is in progress, the Read Status Register instruction may still be accessed

for checking the status of the BUSY bit. The BUSY bit is a 1 during the Sector Erase cycle and

becomes a 0 when the cycle is finished and the device is ready to accept other instructions again.

After the Sector Erase cycle has finished the Write Enable Latch (WEL) bit in Status Register is

cleared to 0. The Sector Erase instruction will not be executed if the addressed page is protected

by the Block Protect (SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory protection

table).

Figure 16. Sector Erase Instruction Sequence Diagram

preliminary(Aug.18.2010) 32

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