FM25D04C-85CA2Y View Datasheet(PDF) - FIDELIX

Part Name

Description

Manufacturer

FM25D04C-85CA2Y

32M-BIT Serial Flash Memory with 4KB Sectors, Dual and QuadI/O SPI

FIDELIX 

FM25Q32

11.2 INSTRUCTIONS

The instruction set of the FM25Q32 consists of fifteen basic instructions that are fully controlled

through the SPI bus (see Instruction Set table). Instructions are initiated with the falling edge of

Chip Select (/CS). The first byte of data clocked into the DI input provides the instruction code.

Data on the DI input is sampled on the rising edge of clock with most significant bit (MSB) first.

Instructions vary in length from a single byte to several bytes and may be followed by address

bytes, data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are

completed with the rising edge of edge /CS. Clock relative timing diagrams for each instruction are

included in figures 4 through 29. All read instructions can be completed after any clocked bit.

However, all instructions that Write, Program or Erase must complete on a byte (/CS driven high

after a full 8-bit have been clocked) otherwise the instruction will be terminated. This feature further

protects the device from inadvertent writes. Additionally, while the memory is being programmed or

erased, or when the Status Register is being written, all instructions except for Read Register will

be ignored until the program or erase cycle has completed.

11.2.1 Manufacturer and Device Identification

MANUFACTRER ID

(M7-M0)

Fidelix Semiconductor

F8h

Device ID

Instruction

FM25Q32

(ID7-ID0)

ABh,90h,EFh,DFh

15h

(ID15-ID0)

9Fh

3216h

preliminary(Aug.18.2010) 17

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