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UC1617 View Datasheet(PDF) - Unspecified

Part Name
Description
Manufacturer
UC1617 Datasheet PDF : 3 Pages
1 2 3
ULTRACHIP
©1999~2012
UC1617S_A1.2
128x128 STN Controller-Driver
UC1617
Single-Chip, Ultra-Low Power
128COM x 128SEG Matrix
Passive LCD Controller-Driver
INTRODUCTION
UC1617s is an advanced high-voltage mixed-signal CMOS IC,
especially designed for the display needs of low power hand-
held devices.
This chip employs UltraChip’s unique DCC (Direct Capacitor
Coupling) driver architecture and FRM (Frame Rate
Modulation) gray-shade modulation scheme to achieve near
crosstalk free images, with well balanced gray shades.
In addition to low power COM and SEG drivers, UC1617s
contains all necessary circuits for high-V LCD power supply,
bias voltage generation, temperature compensation, timing
generation and graphics data memory.
Advanced circuit design techniques are employed to minimize
external component counts and reduce connector size while
achieving extremely low power consumption.
MAIN APPLICATIONS
Cellular Phones and other battery operated palm top
devices or portable Instruments
FEATURE HIGHLIGHTS
Single chip controller-driver for 128x128 matrix STN
LCD with 4 gray shades and B/W Mode.
A software-readable ID pin and an MTP programmable
ID bit to support configurable vender identification.
Partial scroll function and programmable data update
window to support flexible manipulation of screen data.
Support both row ordered and page_c (page column)
ordered display buffer RAM access.
Support industry standard 2-wire, 3-wire, 4-wire serial
buses (I2C, S8, S9) and 8-bit parallel buses (8080 or
6800).
Special driver structure and gray shade modulation
scheme. Consistent low power consumption under all
display patterns.
Fully programmable Mux Rate, partial display window,
Bias Ratio and Line Rate allow many flexible power
management options.
Four software programmable frame rates up to 201Hz.
Support the use of fast Liquid Crystal material for
speedy LCD response.
Software programmable 4 temperature compensation
coefficients.
On-chip Power-ON Reset and Software RESET
command, make RST pin optional.
Self-configuring 9x charge pump with on-chip pumping
capacitors. Only 3 external capacitors are required to
operate.
Flexible data addressing/mapping schemes to support
wide ranges of software models and LCD layout
placements.
Very low pin count (9~10 pins with S8, S9, or I2C) allows
exceptional image quality in COG format on
conventional ITO glass.
Many on-chip and I/O pad layout features to support
optimized COG applications.
VDD (digital) range (Typ.) : 1.8V ~ 3.3V
VDD (analog) range (Typ.) : 2.7V ~ 3.3V
LCD VOP range:
6.0V ~ 15V
Available MTP trimming support precise LCD contrast
matching.
Available in gold bump dies
Bump pitch:
26.5 µM
Bump gap:
12 µM
Bump surface: 2,001 µM2
3
 

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