RM0008
Memory and bus architecture
3.3
Memory map
See the datasheet corresponding to your device for a comprehensive diagram of the
memory map. Table 3 gives the boundary addresses of the peripherals available in all
STM32F10xxx devices.
Boundary address
0xA000 0000 - 0xA000 0FFF
0x5000 0000 - 0x5003 FFFF
0x4003 0000 - 0x4FFF FFFF
0x4002 8000 - 0x4002 9FFF
0x4002 3400 - 0x4002 7FFF
0x4002 3000 - 0x4002 33FF
0x4002 2000 - 0x4002 23FF
0x4002 1400 - 0x4002 1FFF
0x4002 1000 - 0x4002 13FF
0x4002 0800 - 0x4002 0FFF
0x4002 0400 - 0x4002 07FF
0x4002 0000 - 0x4002 03FF
0x4001 8400 - 0x4001 FFFF
0x4001 8000 - 0x4001 83FF
Table 3. Register boundary addresses
Peripheral
Bus
Register map
FSMC
USB OTG FS
Section 21.6.9 on page 563
Section 28.16.6 on page 912
Reserved
-
Ethernet
Reserved
CRC
Flash memory interface
Reserved
Reset and clock control RCC
Reserved
DMA2
DMA1
AHB
Section 29.8.5 on page 1069
-
Section 4.4.4 on page 65
-
-
Section 7.3.11 on page 120
-
Section 13.4.7 on page 288
Reserved
SDIO
-
Section 22.9.16 on page 620
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