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TEA1751(L)T View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
TEA1751(L)T Datasheet PDF : 29 Pages
First Prev 21 22 23 24 25 26 27 28 29
NXP Semiconductors
TEA1751T; TEA1751LT
GreenChip III SMPS control IC
Table 5. Characteristics …continued
Tamb = 25 °C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into
the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
td(vrec-swon)
valley recognition to switch-on
delay time
[5] -
150 -
ns
Soft start flyback (pin FBSENSE)
Istart(soft)fb
flyback soft start current
Vstart(soft)fb
flyback soft start voltage
Rstart(soft)fb
flyback soft start resistance
Overcurrent protection flyback (pin FBSENSE)
enable voltage
75 60 45 μA
0.43 0.49 0.54 V
12 -
-
kΩ
Vsense(fb)max
maximum flyback sense
voltage
ΔV/Δt = 50 mV/μs
ΔV/Δt = 200 mV/μs
0.49 0.52 0.55 V
0.52 0.55 0.58 V
tleb(fb)
flyback leading edge blanking
time
255 305 355 ns
Istart(OPP)FBAUX
OPP start current on pin
FBAUX
-
100 -
μA
Iopp(red)(FBAUX)
reduced overpower protection Vsense(fb)max has reduced to
current on pin FBAUX
0.37 V
-
360 -
μA
Driver (pin FBDRIVER)
Isrc(FBDRIVER)
source current on pin
FBDRIVER
VFBDRIVER = 2 V
-
0.5 -
A
Isink(FBDRIVER)
VO(FBDRIVER)(max)
sink current on pin FBDRIVER
maximum output voltage on pin
FBDRIVER
VFBDRIVER = 2 V
VFBDRIVER = 10 V
-
0.7 -
A
-
1.2 -
A
-
11 12 V
LATCH input (pin LATCH)
Vprot(LATCH)
protection voltage on pin
LATCH
1.23 1.25 1.27 V
IO(LATCH)
Ven(LATCH)
Vhys(LATCH)
output current on pin LATCH
enable voltage on pin LATCH
hysteresis voltage on pin
LATCH
Vprot(LATCH) < VLATCH < Voc(LATCH)
at start-up
Ven(LATCH) Vprot(LATCH)
85 80 75 μA
1.30 1.35 1.40 V
80 100 140 mV
Voc(LATCH)
open-circuit voltage on pin
LATCH
2.65 2.9 3.15 V
Temperature protection
Tpl(IC)
Tpl(IC)hys
IC protection level temperature
hysteresis of IC protection level
temperature
130 140 150 °C
-
10 -
°C
[1] For a typical application with a compensation network on pin PFCCOMP, like the example in Figure 3.
[2] Minimum required voltage change time for valley recognition on pin PFCAUX.
[3] Minimum time required between demagnetization detection and ΔV/Δt = 0 on pin PFCAUX.
[4] Hysteresis for PFC on/off control.
[5] Guaranteed by design.
TEA1751T_LT_2
Product data sheet
Rev. 02 — 23 December 2009
© NXP B.V. 2009. All rights reserved.
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