ISL88731A
Ensure that the required total gate drive current for the selected
MOSFETs should be less than 24mA. So, the total gate charge for
the high-side and low-side MOSFETs is limited by Equation 11:
QGATE
≤
I--G----A----T---E-
fsw
(EQ. 11)
Where IGATE is the total gate drive current and should be less
than 24mA. Substituting IGATE = 24mA and fs = 400kHz into
Equation 11 yields that the total gate charge should be less than
80nC. Therefore, the ISL88731A easily drives the battery charge
current up to 8A.
Snubber Design
ISL88731A's buck regulator operates in discontinuous current
mode (DCM) when the load current is less than half the
peak-to-peak current in the inductor. After the low-side FET turns
off, the phase voltage rings due to the high impedance with both
FETs off. This can be seen in Figure 9. Adding a snubber (resistor
in series with a capacitor) from the phase node to ground can
greatly reduce the ringing. In some situations a snubber can
improve output ripple and regulation.
The snubber capacitor should be approximately twice the
parasitic capacitance on the phase node. This can be estimated
by operating at very low load current (100mA) and measuring the
ringing frequency.
CSNUB and RSNUB can be calculated from Equations 12 and 13:
CSNUB
=
-----------------2------------------
(2πFring)2 ⋅ L
RSNUB =
----2-----⋅---L-----
CSNUB
(EQ. 12)
(EQ. 13)
Input Capacitor Selection
The input capacitor absorbs the ripple current from the
synchronous buck converter, which is given by Equation 14:
Irms
=
IBA
T
-----V---O----U----T---(--V---I--N-----–-----V---O----U---T----)
VIN
(EQ. 14)
This RMS ripple current must be smaller than the rated RMS
current in the capacitor datasheet. Non-tantalum chemistries
(ceramic, aluminum, or OSCON) are preferred due to their
resistance to power-up surge currents when the AC-adapter is
plugged into the battery charger. For Notebook battery charger
applications, it is recommended that ceramic capacitors or
polymer capacitors from Sanyo be used due to their small size
and reasonable cost.
Loop Compensation Design
ISL88731A has three closed loop control modes. One controls
the output voltage when the battery is fully charged or absent. A
second controls the current into the battery when charging and
the third limits current drawn from the adapter. The charge
current and input current control loops are compensated by a
single capacitor on the ICOMP pin. The voltage control loop is
compensated by a network on the VCOMP pin. Descriptions of
these control loops and guidelines for selecting compensation
components will be given in the following sections. Which loop
controls the output is determined by the minimum current buffer
and the minimum voltage buffer shown in the “Functional Block
Diagram” (see Figure 1) on page 2. These three loops will be
described separately.
Transconductance Amplifiers GMV, GMI and
GMS
ISL88731A uses several transconductance amplifiers (also
known as gm amps). Most commercially available op amps are
voltage controlled voltage sources with gain expressed as
A = VOUT/VIN. gm amps are voltage controlled current sources
with gain expressed as gm = IOUT/VIN. gm will appear in some of
the equations for poles and zeros in the compensation.
PWM Gain Fm
The Pulse Width Modulator in the ISL88731A converts voltage at
VCOMP to a duty cycle by comparing VCOMP to a triangle wave
(duty = VCOMP/VP-P RAMP). The low-pass filter formed by L and
CO convert the duty cycle to a DC output voltage
(Vo = VDCIN*duty). In ISL88731A, the triangle wave amplitude is
proportional to VDCIN. Making the ramp amplitude proportional
to DCIN makes the gain from VCOMP to the PHASE output a
constant 11 and is independent of DCIN. For small signal AC
analysis, the battery is modeled by its internal resistance. The
total output resistance is the sum of the sense resistor and the
internal resistance of the MOSFETs, inductor and capacitor.
Figure 20 shows the small signal model of the pulse width
modulator (PWM), power stage, output filter and battery.
RAMP GEN
VRAMP = VDD/11
-
+
PWM
INPUT
VDD
L
CO
PWM
GAIN=11
L
RSENSE
11
RFET_RDSON
RL_DCR
CO
PWM
INPUT
RESR
RBAT
FIGURE 20. SMALL SIGNAL AC MODEL
In most cases the Battery resistance is very small (<200mΩ)
resulting in a very low Q in the output filter. This results in a
frequency response from the input of the PWM to the inductor
current with a single pole at the frequency calculated in
Equation 15:
FPOLE1
=
(---R----S---E----N---S----E----+-----r--D----S----(--O---N----)---+-----R----D----C----R-----+-----R----B---A----T---)
2π ⋅ L
(EQ. 15)
18
FN6738.3
June 8, 2011