M1A3P400-2FGG144PP View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

M1A3P400-2FGG144PP

1 – ProASIC®3 Flash Family FPGAs with Optional Soft ARM Support

Unspecified 

ProASIC3 DC and Switching Characteristics

tPY

PAD

Y

tDIN

DQ

CLK

DIN

To Array

tPY = MAX(tPY(R), tPY(F))

tDIN = MAX(tDIN(R), tDIN(F))

I/O Interface

VIH

PAD

Vtrip

Vtrip

VIL

VCC

Y

GND

50%

tPY

(R)

50%

tPY

(F)

DIN

GND

50%

tDOUT

(R)

VCC

50%

tDOUT

(F)

Figure 2-3 • Input Buffer Timing Model and Delays (example)

2-14

v1.1

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