FW82801IRSLAXE View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FW82801IRSLAXE

Intel® I/O Controller Hub 9 (ICH9) Family

Intel 

17.2

17.1.34FLR_CTRL—Function Level Reset Control Register

(USB EHCI—D29:F7, D26:F7) ................................................................ 675

17.1.35FLR_STS—Function Level Reset Status Register

(USB EHCI—D29:F7, D26:F7) ................................................................ 675

17.1.36EHCIIR2—EHCI Initialization Register 2

(USB EHCI—D29:F7, D26:F7) ................................................................ 675

Memory-Mapped I/O Registers .......................................................................... 676

17.2.1 Host Controller Capability Registers ........................................................ 676

17.2.1.1 CAPLENGTH—Capability Registers Length Register ...................... 677

17.2.1.2 HCIVERSION—Host Controller Interface Version Number

Register................................................................................. 677

17.2.1.3 HCSPARAMS—Host Controller Structural Parameters.................... 678

17.2.1.4 HCCPARAMS—Host Controller Capability Parameters

Register................................................................................. 679

17.2.2 Host Controller Operational Registers ...................................................... 680

17.2.2.1 USB2.0_CMD—USB 2.0 Command Register ................................ 681

17.2.2.2 USB2.0_STS—USB 2.0 Status Register ...................................... 684

17.2.2.3 USB2.0_INTR—USB 2.0 Interrupt Enable Register ....................... 686

17.2.2.4 FRINDEX—Frame Index Register ............................................... 687

17.2.2.5 CTRLDSSEGMENT—Control Data Structure Segment

Register................................................................................. 688

17.2.2.6 PERIODICLISTBASE—Periodic Frame List Base Address

Register................................................................................. 688

17.2.2.7 ASYNCLISTADDR—Current Asynchronous List Address

Register................................................................................. 689

17.2.2.8 CONFIGFLAG—Configure Flag Register ....................................... 689

17.2.2.9 PORTSC—Port N Status and Control Register .............................. 690

17.2.3 USB 2.0-Based Debug Port Register ........................................................ 694

17.2.3.1 CNTL_STS—Control/Status Register .......................................... 695

17.2.3.2 USBPID—USB PIDs Register ..................................................... 697

17.2.3.3 DATABUF[7:0]—Data Buffer Bytes[7:0] Register ......................... 697

17.2.3.4 CONFIG—Configuration Register ............................................... 697

18 Intel® High Definition Audio Controller Registers (D27:F0) ................................... 699

18.1 Intel® High Definition Audio PCI Configuration Space

(Intel® High Definition Audio— D27:F0) ............................................................. 699

18.1.1 VID—Vendor Identification Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 701

18.1.2 DID—Device Identification Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 701

18.1.3 PCICMD—PCI Command Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 701

18.1.4 PCISTS—PCI Status Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 702

18.1.5 RID—Revision Identification Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 703

18.1.6 PI—Programming Interface Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 703

18.1.7 SCC—Sub Class Code Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 703

18.1.8 BCC—Base Class Code Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 703

18.1.9 CLS—Cache Line Size Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 703

18.1.10LT—Latency Timer Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 704

18.1.11HEADTYP—Header Type Register

(Intel® High Definition Audio Controller—D27:F0)..................................... 704

Intel® I/O Controller Hub 9 (ICH9) Family Datasheet

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