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NM93C46AVN データシートの表示(PDF) - National ->Texas Instruments

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NM93C46AVN 1024-Bit Serial EEPROM (MICROWIRE Bus Interface) National-Semiconductor
National ->Texas Instruments National-Semiconductor
NM93C46AVN Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Capacitance
TA e a25 C f e 1 MHz
Symbol
Test
Max Units
COUT
Output Capacitance
5
pF
CIH
Input Capacitance
5
pF
Note 1 Stress above those listed under ‘‘Absolute Maximum Ratings’’ may cause permanent damage to the device This is a stress rating only and operation of the
device at these or any other conditions above those indicated in the operational sections of the specification is not implied Exposure to absolute maximum rating
conditions for extended periods may affect device reliability
Note 2 CS (Chip Select) must be brought low (to VIL) for an interval of tCS in order to reset all internal device registers (device reset) prior to beginning another
opcode cycle (This is shown in the opcode diagrams in the following pages)
Note 3 Typical leakage values are in the 20 nA range
Note 4 The shortest allowable SK clock period e 1 fSK (as shown under the fSK parameter) Maximum SK clock speed (minimum SK period) is determined by the
interaction of several AC parameters stated in the datasheet Within this SK period both tSKH and tSKL limits must be observed Therefore it is not allowable to set
1 fSK e tSKH(minimum) a tSKL(minimum) for shorter SK cycle time operation
AC Test Conditions
VCC Range
2 0V s VCC k 4 5V
(Extended Voltage Levels)
4 5V s VCC s 5 5V
(TTL Levels)
VIL VIH
Input Levels
0 3V 1 8V
VIL VIH
Timing Level
1 0V
VOL VOH
Timing Level
0 8V 1 5V
0 4V 2 4V
1 0V 2 0V
0 4V 2 4V
Output Load 1 TTL Gate (CL e 100 pF)
IOL IOH
g10 mA
b2 1 mA 0 4 mA
5
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