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LM4050CEM3-2.5-T View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
LM4050CEM3-2.5-T Datasheet PDF : 14 Pages
First Prev 11 12 13 14
50ppm/°C Precision Micropower Shunt Voltage
References with Multiple Reverse Breakdown Voltages
Pin Description
PIN
NAME
FUNCTION
1
+
Positive Terminal of the Shunt Reference
2
−
Negative Terminal of the Shunt Reference
3
N.C. No connection. Leave this pin unconnected or connected to pin 2.
Detailed Description
The LM4050/LM4051 shunt references use the
bandgap principle to produce a stable, accurate volt-
age. The device behaves similarly to an ideal zener
diode; a fixed voltage is maintained across its output
terminals when biased with 60µA to 15mA of reverse
current. The LM4050/LM4051 clamps to a voltage of
one diode drop below ground when biased with for-
ward currents up 10mA.
Figure 3 shows a typical operating circuit. The
LM4050/LM4051 are ideal for providing stable refer-
ences from a high-voltage power supply.
Applications Information
The LM4050/LM4051s’ internal pass transistors are used
to maintain a constant output voltage (VSHUNT) by sinking
the necessary amount of current across a source resistor.
The source resistance (RS) is determined from the load
current (ILOAD) range, supply voltage (VS) variations,
VSHUNT, and desired quiescent current.
Choose the value of RS when VS is at a minimum and ILOAD
is at a maximum. Maintain a minimum ISHUNT of 60µA at all
times. The RS value should be large enough to keep
ISHUNT less than 15mA for proper regulation when VS is
maximum and ILOAD is at a minimum. To prevent damage
to the device, ISHUNT should never exceed 20mA.
Therefore, the value of RS is bounded by the following
equation:
[VS(MIN) - VR ] / [60µA + ILOAD(MAX)] > RS >
[VS(MAX) - VR ] / [20mA + ILOAD(MIN)]
Choosing a larger resistance minimizes the total power dis-
sipation in the circuit by reducing the shunt current
(PD(TOTAL) = VS ✕ ISHUNT). Provide a safety margin to
incorporate the worst-case tolerance of the resistor used.
Ensure that the resistor’s power rating is adequate, using
the following general power equation:
PDR = ISHUNT ✕ (VS(MAX) - VSHUNT)
Output Capacitance
The LM4050/LM4051 do not require external capacitors
for frequency stability and are stable for any output
capacitance.
VS
ISHUNT + ILOAD
RS
ILOAD
VR
ISHUNT
LM4050/LM4051
Figure 3. Typical Operating Circuit
Temperature Performance
The LM4050/LM4051 typically exhibit output voltage
temperature coefficients within ±15ppm/°C. The polari-
ty of the temperature coefficients may be different from
one device to another; some may have positive coeffi-
cients, and others may have negative coefficients.
High Temperature Operation
The maximum junction temperature of the LM4050/
LM4051 is +150°C. The maximum operating temperature
for the LM4050/LM4051_E_ is +125°C. At a maximum
load current of 15mA and a maximum output voltage of
5V, the parts dissipate 75mW of power. The power dissi-
pation limits of the 3-pin SC70 call for a derating value of
2.17mW/°C above +70°C and thus for 75mW of power
dissipation, the parts self-heat to 35.56°C above ambient
temperature. If the ambient temperature is +125°C, the
parts operate at 159.56°C, thereby exceeding the maxi-
mum junction temperature value of +150°C. For high-
temperature operation, care must be taken to ensure the
combination of ambient temperature, output power dissi-
pation, and package thermal resistance does not con-
spire to raise the device temperature beyond that listed
in the Absolute Maximum Ratings. Either reduce the out-
put load current or the ambient temperature to keep the
part within the limits.
Chip Information
TRANSISTOR COUNT: 60
PROCESS: BiCMOS
______________________________________________________________________________________ 11
 

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