M48T128Y-85PM1TR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M48T128Y-85PM1TR

5.0 or 3.3V, 1 Mbit (128 Kb x 8) TIMEKEEPER ®SRAM

STMicroelectronics 

M48T128Y, M48T128V*

Data Retention Mode

With valid VCC applied, the M48T128Y/V operates

as a conventional BYTEWIDE™ static RAM.

Should the supply voltage decay, the RAM will au-

tomatically power-fail deselect, write protecting it-

self when VCC falls within the VPFD (max), VPFD

(min) window. All outputs become high imped-

ance, and all inputs are treated as “Don't care.”

Note: A power failure during a WRITE cycle may

corrupt data at the currently addressed location,

but does not jeopardize the rest of the RAM's con-

tent. At voltages below VPFD (min), the user can be

assured the memory will be in a write protected

state, provided the VCC fall time is not less than tF.

The M48T128Y/V may respond to transient noise

spikes on VCC that reach into the deselect window

during the time the device is sampling VCC. There-

fore, decoupling of the power supply lines is rec-

ommended.

When VCC drops below VSO, the control circuit

switches power to the internal battery, preserving

data and powering the clock. The internal energy

source will maintain data in the M48T128Y/V for

an accumulated period of at least 10 years at room

temperature. As system power rises above VSO,

the battery is disconnected, and the power supply

is switched to external VCC. Deselect continues for

tREC after VCC reaches VPFD (max).

10/22

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