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M62334FP View Datasheet(PDF) - Renesas Electronics

Part NameDescriptionManufacturer
M62334FP 8-bit 4ch I2C BUS D/A Converter with Buffer Amplifiers Renesas
Renesas Electronics Renesas
M62334FP Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
M62334P/FP, M62339P/FP
I2C BUS Line Characteristics
Item
Symbol
Min.
Max.
Unit
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START condition
(After this period, the first clock pulse is generated)
fSCL
tBUF
tHD:STA
0
100
kHz
4.7
µs
4.0
µs
Low period of the clock
tLOW
4.7
µs
High period of the clock
tHIGH
4.0
µs
Set-up time for START condition
(Only relevant for a repeated START condition)
tSU:STA
4.7
µs
Hold time DATA
tHD:DAT
0
µs
Set-up time DATA
tSU:DAT
250
ns
Rise time of both SDA and SCL lines
tR
1000
ns
Fall time of both SDA and SCL lines
Set-up time for STOP condition
tF
tSU:STO
300
ns
4.0
µs
Note: Transmitter must internally provide at least a hold time to bridge the undefined region (300 ns Max) of the falling
edge of SCL.
Timing Chart
VIH
SDA
VIL
tHD:STA
tR, tF
tSU:DAT
tHD:DAT
tSU:STA
tBUF
tSU:STO
VIH
SCL
VIL
Start
tLOW
tHIGH
Start
Stop
Start
REJ03D0866-0400 Rev.4.00 Mar 25, 2008
Page 4 of 9
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