62884CIRTZ View Datasheet(PDF) - Intersil
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62884CIRTZ Datasheet PDF : 30 Pages
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ISL62884C
Differential Sensing
Figure 9 also shows the differential voltage sensing
scheme. VCCSENSE and VSSSENSE are the remote
voltage sensing signals from the processor die. A unity
gain differential amplifier senses the VSSSENSE voltage
and adds it to the DAC output. The error amplifier
regulates the inverting and the non-inverting input
voltages to be equal, therefore:
VCCSENSE + VDROOP = VDAC + VSSSENSE
(EQ. 3)
Rewriting Equation 3 and substituting Equation 2 gives:
VCCSENSE – VSSSENSE = VDAC – RDROOP × IDROOP (EQ. 4)
Equation 4 is the exact equation required for load line
implementation.
The VCCSENSE and VSSSENSE signals come from the
processor die. The feedback will be open circuit in the
absence of the processor. As shown in Figure 9, it is
recommended to add a “catch” resistor to feed the VR
local output voltage back to the compensator, and add
another “catch” resistor to connect the VR local output
ground to the RTN pin. These resistors, typically
10Ω ~100Ω, will provide voltage feedback if the system is
powered up without a processor installed.
CCM Switching Frequency
The RFSET resistor between the COMP and the VW pins
sets the VW windows size, which therefore sets the
switching frequency. When the ISL62884C is in
continuous conduction mode (CCM), the switching
frequency is not absolutely constant due to the nature of
the R3™ modulator. As explained in “Multiphase R3™
Modulator” on page 11, the effective switching frequency
will increase during load insertion and will decrease
during load release to achieve fast response. On the
other hand, the switching frequency is relatively constant
at steady state. Variation is expected when the power
stage condition, such as input voltage, output voltage,
load, etc. changes. The variation is usually less than 15%
and doesn’t have any significant effect on output voltage
ripple magnitude. Equation 5 gives an estimate of the
frequency-setting resistor RFSET value. 8kΩ RFSET gives
approximately 300kHz switching frequency. Lower
resistance gives higher switching frequency.
RFSET(kΩ) = (Period(μs) – 0.29) × 2.65
(EQ. 5)
Modes of Operation
TABLE 2. ISL62884C MODES OF OPERATION
SLEW RATE
DPRSTP# DPRSLPVR OPERATIONAL MODE (mV/µs)
0
0
1-phase CCM
10
0
1
1-phase DE
2.5
1
0
1-phase CCM
10
1
1
1-phase CCM
2.5
Table 2 shows the ISL62884C operational modes,
programmed by the logic status of the DPRSLPVR pin and
the DPRSTP# pin. The ISL62884C enters 1-phase DE
mode when there is DPRSLPVR = 0 and DPRSLPVR = 1.
DPRSLPVR logic status also controls the output voltage
slew rate.
Dynamic Operation
The ISL62884C responds to VID changes by slewing to
the new voltage at a slew rate programmed by the logic
status on the DPRSLPVR pin, as Table 2 shows. The slew
rate is 10mV/µs for DPRSLPVR = 0 and is 1/4 of that for
DPRSLPVR = 1. As the output approaches the VID
command voltage, the dv/dt moderates to prevent
overshoot.
When the ISL62884C is in DE mode, it will actively drive
the output voltage up when the VID changes to a higher
value. Thus, will resume DE mode operation after
reaching the new voltage level. If the load is light enough
to warrant DCM, it will enter DCM after the inductor
current has crossed zero for four consecutive cycles. The
ISL62884C will remain in DE mode when the VID
changes to a lower value. The output voltage will decay
to the new value and the load will determine the slew
rate.
During load insertion response, the Fast Clock function
increases the PWM pulse response speed. The
ISL62884C monitors the VSEN pin voltage and compares
it to 100ns-filtered version. When the unfiltered version
is 20mV below the filtered version, the controller knows
there is a fast voltage dip due to load insertion, hence
issues an additional master clock signal to deliver a PWM
pulse immediately.
The R3™ modulator intrinsically has voltage feed
forward. The output voltage is insensitive to a fast slew
rate input voltage change.
Protections
The ISL62884C provides overcurrent, undervoltage,
and overvoltage protections.
The ISL62884C determines overcurrent protection
(OCP) by comparing the average value of the droop
current IDROOP with an internal current source
threshold. It declares OCP when IDROOP is above the
threshold for 120µs. A resistor Rcomp from the COMP
pin to GND programs the OCP current source threshold,
as well as the overshoot reduction function (to be
discussed in later sections), as Table 3 shows. It is
recommended to use the nominal Rcomp value. The
ISL62884C detects the Rcomp value at the beginning of
start-up, and sets the internal OCP threshold
accordingly. It remembers the Rcomp value until the
VR_ON signal drops below the POR threshold.
15
FN7591.0
March 16, 2010
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