Lattice/Vantis offers software design support for MACH devices in both the MACHXL® and
DesignDirect development systems. The DesignDirect development system is Vantis’
implementation software that includes support for all Vantis CPLD, FPGA and SPLD devices. This
system is supported under Windows ’95, ’98 and NT as well as Sun Solaris and HPUX.
DesignDirect software is designed for use with design entry, simulation and veriﬁcation software
from leading-edge tool vendors such as Cadence, Exemplar Logic, Mentor Graphics, Model
Technology , Synopsys, Synplicity, Viewlogic and others. It accepts EDIF 2 0 0 input netlists,
generates JEDEC ﬁles for Vantis PLDs and creates industry-standard EDIF, Verilog, VITAL-
compliant VHDL and SDF simulation netlist for design veriﬁcation.
DesignDirect software is also available in product conﬁgurations that include VHDL and Verilog
synthesis from Exemplar Logic and VHDL, Verilog RTL and gate level timing simulation from
Model Technology. Schematic capture and ABEL entry, as well as functional simulation, are also
MACH 4 Family