M4-32/32-12JC View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
M4-32/32-12JC
Lattice Semiconductor
M4-32/32-12JC Datasheet PDF : 62 Pages
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A reset/preset swapping feature in each macrocell allows for reset and preset to be exchanged,
providing flexibility. In asynchronous mode (Figure 8), a single individual product term is
provided for initialization. It can be selected to control reset or preset.
Power-Up
Reset
Power-Up
Preset
Individual
Reset
Product Term
Individual
Preset
Product Term
AP AR
D/L/T Q
AP AR
D/L/T Q
a. Reset
b. Preset
17466G-014
Figure 8. Asynchronous Mode Initialization Configurations
17466G-015
Note that the reset/preset swapping selection feature effects power-up reset as well. The
initialization functionality of the flip-flops is illustrated in Table 13. The macrocell sends its data
to the output switch matrix and the input switch matrix. The output switch matrix can route this
data to an output if so desired. The input switch matrix can send the signal back to the central
switch matrix as feedback.
Table 13. Asynchronous Reset/Preset Operation
AR
AP
CLK/LE1
Q+
0
0
X
See Table 12
0
1
X
1
1
0
X
0
1
1
X
0
Note:
1. Transparent latch is unaffected by AR, AP
Output Switch Matrix
The output switch matrix allows macrocells to be connected to any of several I/O cells within a
PAL block. This provides high flexibility in determining pinout and allows design changes to
occur without effecting pinout.
In MACH 4 and MACH 4A devices with 2:1 Macrocell-I/O cell ratio, each PAL block has twice as
many macrocells as I/O cells. The MACH 4 output switch matrix allows for half of the macrocells
to drive I/O cells within a PAL block, in combinations according to Figure 9. Each I/O cell can
choose from eight macrocells; each macrocell has a choice of four I/O cells. The MACH 4 and
MACH 4A devices with 1:1 Macrocell-I/O cell ratio allow each macrocell to drive one of eight I/
O cells (Figure 9).
MACH 4 Family
17
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