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M4-128 View Datasheet(PDF) - Lattice Semiconductor

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M4-128 Datasheet PDF : 62 Pages
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The flip-flop can be configured as a D-type or T-type latch. J-K or S-R registers can be
synthesized. The primary flip-flop configurations are shown in Figure 6, although others are
possible. Flip-flop functionality is defined in Table 12. Note that a J-K latch is inadvisable as it
will cause oscillation if both J and K inputs are HIGH.
AP AR
D
Q
AP AR
D
Q
a. D-type with XOR
AP AR
L
Q
G
c. Latch with XOR
AP AR
T
Q
e. T-type with programmable T polarity
b. D-type with programmable D polarity
AP AR
L
Q
G
d. Latch with programmable D polarity
f. Combinatorial with XOR
g. Combinatorial with programmable polarity
Figure 6. Primary Macrocell Configurations
MACH 4 Family
17466G-011
15
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