6N137WM View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
6N137WM Datasheet PDF : 15 Pages
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Electrical Characteristics (Continued)
Transfer Characteristics (TA = -40 to +85°C unless otherwise specified)
Symbol DC Characteristics
Test Conditions
IOH HIGH Level Output Current VCC = 5.5V, VO = 5.5V,
IF = 250µA, VE = 2.0V(2)
VOL LOW Level Output Current VCC = 5.5V, IF = 5mA, VE = 2.0V,
ICL = 13mA(2)
IFT
Input Threshold Current
VCC = 5.5V, VO = 0.6V, VE = 2.0V,
IOL = 13mA
Min.
Typ.* Max.
100
.35
0.6
3
5
Unit
µA
V
mA
Isolation Characteristics (TA = -40°C to +85°C unless otherwise specified.)
Symbol
Characteristics
Test Conditions
Min.
II-O
VISO
RI-O
CI-O
Input-Output Insulation
Leakage Current
Withstand Insulation Test
Voltage
Resistance (Input to Output)
Capacitance (Input to Output)
Relative humidity = 45%,
TA = 25°C, t = 5s,
VI-O = 3000 VDC(12)
RH < 50%, TA = 25°C,
II-O ≤ 2µA, t = 1 min.(12)
VI-O = 500V(12)
f = 1MHz(12)
2500
*All Typicals at VCC = 5V, TA = 25°C
Typ.*
1012
0.6
Max.
1.0*
Unit
µA
VRMS
Ω
pF
Notes:
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package VCC and GND pins of each device.
2. Each channel.
3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
4. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current
pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
5. tPHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current
pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
HIGH state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/µs).
11. CML – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the
LOW output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
©2005 Fairchild Semiconductor Corporation
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.8
4
www.fairchildsemi.com
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