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74HC14 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
74HC14
Fairchild
Fairchild Semiconductor Fairchild
74HC14 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
September 1983
Revised January 2005
MM74HC14
Hex Inverting Schmitt Trigger
General Description
The MM74HC14 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and high
noise immunity of standard CMOS, as well as the capability
to drive 10 LS-TTL loads.
The 74HC logic family is functionally and pinout compatible
with the standard 74LS logic family. All inputs are protected
from damage due to static discharge by internal diode
clamps to VCC and ground.
Features
s Typical propagation delay: 13 ns
s Wide power supply range: 2–6V
s Low quiescent current: 20 µA maximum (74HC Series)
s Low input current: 1 µA maximum
s Fanout of 10 LS-TTL loads
s Typical hysteresis voltage: 0.9V at VCC = 4.5V
Ordering Code:
Order Number
Package
Number
Package Description
MM74HC14M
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC14MX_NL
M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC14SJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC14MTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC14MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
MM74HC14N
N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
MM74HC14N_NL
N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
© 2005 Fairchild Semiconductor Corporation DS005105
www.fairchildsemi.com
 

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