PM7524 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
PM7524 Datasheet PDF : 8 Pages
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AD7524–SPECIFICATIONS (VREF = +10 V, VOUT1 = VOUT2 = 0 V, unless otherwise noted)
Parameter
Limit, TA = +25؇C
Limit, TMIN, TMAX1
VDD = +5 V VDD = +15 V VDD = 5 V VDD = +15 V Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
Relative Accuracy
J, A, S Versions
K, B, T Versions
L, C, U Versions
Monotonicity
Gain Error2
Average Gain TC3
DC Supply Rejection,3 ∆Gain/∆VDD
Output Leakage Current
IOUT1 (Pin 1)
IOUT2 (Pin 2)
8
8
8
8
± 1/2
± 1/2
± 1/2
± 1/4
± 1/2
± 1/8
Guaranteed Guaranteed
± 2 1/2
± 1 1/4
± 40
± 10
± 1/2
± 1/2
± 1/2
Guaranteed
± 3 1/2
± 40
± 1/2
± 1/4
± 1/8
Guaranteed
± 1 1/2
± 10
0.08
0.02
0.16
0.002
0.001
0.01
0.04
0.005
± 50
± 50
± 50
± 50
± 400
± 400
± 200
± 200
Bits
LSB max
LSB max
LSB max
LSB max
ppm/°C
% FSR/% max
% FSR/% typ
Gain TC Measured from +25°C to
TMIN or from +25°C to TMAX
∆VDD = ± 10%
nA max
nA max
DB0–DB7 = 0 V; WR, CS = 0 V; VREF = ± 10 V
DB0–DB7 = VDD; WR, CS = 0 V; VREF = ± 10 V
DYNAMIC PERFORMANCE
Output Current Settling Time3
(to 1/2 LSB)
400
250
500
350
AC Feedthrough3
at OUT1
at OUT2
0.25
0.25
0.5
0.5
0.25
0.25
0.5
0.5
ns max
% FSR max
% FSR max
OUT1 Load = 100 Ω, CEXT = 13 pF; WR, CS =
0 V; DB0–DB7 = 0 V to VDD to 0 V.
VREF = ± 10 V, 100 kHz Sine Wave; DB0–DB7 =
0 V; WR, CS = 0 V
REFERENCE INPUT
RIN (Pin 15 to GND)4
5
5
5
5
20
20
20
20
kΩ min
kΩ max
ANALOG OUTPUTS
Output Capacitance3
COUT1 (Pin 1)
COUT2 (Pin 2)
COUT1 (Pin 1)
COUT2 (Pin 2)
120
120
120
30
30
30
30
30
30
120
120
120
DIGITAL INPUTS
Input HIGH Voltage Requirement
VIH
+2.4
+13.5
+2.4
Input LOW Voltage Requirement
VIL
Input Current
+0.8
+1.5
+0.5
IIN
Input Capacitance3
±1
±1
± 10
DB0–DB7
5
5
5
WR, CS
20
20
20
SWITCHING CHARACTERISTICS
Chip Select to Write Setup Time5
tCS
AD7524J, K, L, A, B, C
170
100
220
AD7524S, T, U
170
100
240
Chip Select to Write Hold Time
tCH
All Grades
0
0
0
Write Pulse Width
tWR
AD7524J, K, L, A, B, C
170
100
220
AD7524S, T, U
170
100
240
Data Setup Time
tDS
AD7524J, K, L, A, B, C
135
60
170
AD7524S, T, U
135
60
170
Data Hold Time
tDH
All Grades
10
10
10
120
30
30
120
+13.5
+1.5
± 10
5
20
130
150
0
130
150
80
100
10
pF max
pF max
pF max
pF max
V min
V max
µA max
pF max
pF max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
DB0–DB7 = VDD; WR, CS = 0 V
DB0–DB7 = 0 V; WR, CS = 0 V
VIN = 0 V or VDD
VIN = 0 V
VIN = 0 V
See Timing Diagram
tWR = tCS
tCS ≥ tWR, tCH ≥ 0
POWER SUPPLY
IDD
1
2
2
2
100
100
500
500
NOTES
1Temperature ranges as follows: J, K, L versions: –40°C to +85°C
A, B, C versions: –40°C to +85°C
S, T, U versions: –55°C to +125°C
2Gain error is measured using internal feedback resistor. Full-Scale Range (FSR) = VREF.
3Guaranteed not tested.
4DAC thin-film resistor temperature coefficient is approximately –300 ppm/°C.
5AC parameter, sample tested @ +25°C to ensure conformance to specification.
Specifications subject to change without notice.
mA max
µA max
All Digital Inputs VIL or VIH
All Digital Inputs 0 V or VDD
–2–
REV. B
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