PA7024S-25 View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
PA7024S-25 Datasheet PDF : 6 Pages
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PA7024
Table 1. A.C. Electrical Characteristics Sequential over the operating range
Symbol
tSCI
tSCX
tCOI
tCOX
tHX
tSK
tAK
tHK
tSI
tHI
tPK
tSPI
tHPI
tCK
tCW
fMAX1
fMAX2
fMAX3
fMAX4
fTGL
tPR
tST
tAW
tRT
tRTV
tRTC
tRW
tRESET
Parameter6,12
Internal set-up to system clock8 - LCC14
(tAL + tSK + tLC - tCK)
Input16 (EXT.) set-up to system clock, - LCC (tIA + tSCI)
System-clock to Array Int. - LCC/IOC/INC14 (tCK +tLC)
System-clock to Output Ext. - LCC (tCOI + tLO)
Input hold time from system clock - LCC
LCC Input set-up to async. clock13 - LCC
Clock at LCC or IOC - LCC output
LCC input hold time from system clock - LCC
Input set-up to system clock - IOC/INC14 (tSK - tCK)
Input hold time from system clock - IOC/INC14 (tSK - tCK)
Array input to IOC PCLK clock
Input set-up to PCLK clock18 - IOC/INC (tSK-tPK-tIA)16
Input hold from PCLK clock18 - IOC/INC (tPK+tIA-tSK)16
System-clock delay to LCC/IOCINC
System-clock low or high pulse width
Max. system-clock frequency Int/Int 1/(tSCI + tCOI)
Max. system-clock frequency Ext/Int 1/(tSCX + tCOI)
Max. system-clock frequency Int/Ext 1/(tSCI + tCOX)
Max. system-clock frequency Ext/Ext 1/(tSCX + tCOX)
Max. system-clock toggle frequency 1/(tCW + tCW)9
LCC presents/reset to LCC output
Input to Global Cell present/reset (tIA + tAL + tPR)
Asynch. preset/reset pulse width
Input to LCC Reg-Type (RT)
LCC Reg-Type to LCC output register change
Input to Global Cell register-type change (tRT + tRTV)
Asynch. Reg-Type pulse width
Power-on reset time for registers in clear state2
-15
Min Max
6
8
8
12
0
3
1
4
0
4
6
0
5
7
7
71.4
62.5
55.5
50.0
71.4
1
12
8
6
1
7
10
5
-20
Min Max
9
11
8
13
0
3
1
4
0
4
7
0
6
7
7
58.8
52.6
45.5
41.6
71.4
1
15
8
8
1
9
10
5
I-25
Min Max
15
17
8
13
0
4
1
4
0
4/3
9
0
7
7
8
43.5
40.0
35.7
33.3
62.5
2
20
8
10
2
12
10
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
µs
4 of 6
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