18730 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

18730

Power Management IC with Five Regulated Outputs Programmed Through 3-Wire Serial Interface

Freescale Semiconductor 

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

START-UP CONTROL INPUT (SYSTEM CONTROL)

The latch is set at the rising edge of any WAKE1B-4B input

pin, and WAKE(int) goes High. WAKE1~4B inputs consist of

OR logic. At this time, the input pin which went Low keeps

latched until CLEAR goes High. After the latch is reset by

CLEAR, WAKE(int) goes Low when SLEEP goes High. The

latch is also cleared and WAKE(int) goes Low when SLEEP

goes High before the latch is cleared by CLEAR. In this case,

CLEAR keeps negated while PGOOD1, 2(Ext) is Low.

SLEEP keeps negated while PGOOD1, 2(Ext) is Low or

CLEAR is High. The period of time for which CLEAR and

SLEEP are negated can be set by the SEQ_SELECT pin.

Refer to Truth Table 5, on page 12 for the correspondence

between the SEQ_SELECT pin settings and negation period.

If SLEEP goes High to place the chip into the standby

mode while any of the WAKEB pins is Low, the chip can be

awakened again. This may happen if, when an WAKEB pin

and LSWO are connected, SLEEP goes High earlier than the

period of time (*1) specified by the external component of the

WAKEB pin.

Also, if the period of time after WAKE(int) goes High until

CLEAR goes High from Low is longer than the time specified

by WATCHDOG, internal sleep will start up to place the chip

into the standby mode.

(*1: It is 30 µsec when a capacitor is not connected as the

external component.)

WAKEB

CLEAR

WATCHDOG

Time specified by WATCHDOG

WAKE(Int)

Figure 6. Start-Up Timing Diagram

STANDBY POWER SUPPLY CIRCUIT

LSWO

CLEAR

VBATT

HVB VO1_SENSE VBATT

Short-circuit VBATT and LVB, and connect a

Schottky diode between VBATT and V_STDBY

only when using Ni_mh.

PGOOD1

PGOOD1(Int)

Standby

Power

Supply

Control

LVB

V_STDBY

V_STDBY

When using Li_ion, leave LVB open, and short-

circuit HVB and VBATT.

Figure 7. Standby Power Supply Circuit Diagram

When PGOOD1(int) is Low, output LVB voltage to

V_STDBY pin. When PGOOD1(int) is High, output

VO1_SENSE voltage to V_STDBY pin. When CLEAR is Low,

LSWO is open. When PGOOD1(int) is High and CLEAR is

High, LSWO output voltage turns GND. When PGOOD1(int)

is Low and PGOOD1 is High, discharge the external

Analog Integrated Circuit Device Data

Freescale Semiconductor

18730

17

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