DK1241A View Datasheet(PDF) - PMD
Part Name
Description
Manufacturer
DK1241A Datasheet PDF : 60 Pages
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Command Summary:
The following table summarizes the commands that are used in
conjunction with microstepping signal generation:
Command
Function
SET_PHASE_3
Sets the commutation waveform for 3-
phase brushless motors.
SET_PHASE_2
Sets the commutation waveform for 2-
phase brushless motors.
GET_PHASE_INFO
Returns type of waveform selected.
SET_MTR_CMD
Sets the motor command register, used
to control the motor output amplitude.
SET_BUF_MTR_CMD
Sets the buffered motor command
register. Functions identically to
SET_MTR_CMD except that an
UPDATE is required for it take effect.
Motor Output
The MC1241A series of chipsets support two motor output methods,
PWM and DAC.
The motor output method is host-selectable. The selected method
affects all axes (motor output mode is not individually programmable for
each axis). The host commands to select these output modes are
SET_OUTPUT_PWM (to select PWM mode), and
SET_OUTPUT_DAC16 (to select 16 bit DAC mode).
Motor Output Signal Interpretation
The diagram below shows typical waveforms for a single output phase
of the MC1241A chipset. Each phase has a similar waveform, although
the phase of the B channel output is shifted relative to the A channel
output by 90 or 120 degrees (depending on the waveform selected).
+ motor command
0
- motor command
The waveform is centered around an output value of 0. The magnitude
of the overall generated waveform is controlled by the motor command
register (SET_MTR_CMD or SET_BUF_MTR_CMD cmds).
For example if the chipset is connected to a DAC with an output range
of -10 Volts to + 10 Volts and the chipset is set to a motor command
value of 32,767 (which is the maximum allowed value) than as the
motor rotates through a full electrical cycle, a sinusoidal waveform
centered at 0 volts will be output with a minimum voltage of - 10, and a
maximum voltage of +10.
DAC16 Decoding
The digital values output by the chipset to the DAC encode the desired
voltages as a 16-bit digital word. The minimum voltage is output as a
digital word value of 0, a voltage of 0 Volts is output as a digital word of
32,768 (dec.), and the maximum positive voltage is output as a digital
word value of 65,535 (dec.).
To load each of the four (MC1241A) or two (MC1141A) DACs, the DAC
control pins in combination with the chipset's 16-bit data bus are used.
To load a particular DAC, The DAC address (1 of 4) is output on the
signals DAC16Addr0-1, the 16 bits of DAC data are output on pins
Data0-11 (high 12 bits), as well as DACLow0-3 (low 4 bits), I/OAddr0-3
and DACSlct are high, and I/OWrite is low.
For more information on the DAC signal timing & conditions, see the
Pin Descriptions and timing diagrams section of this manual.
DACs with lower resolution than 16 bits can also be used. To connect
to a DAC with less resolution, the high order bits of the 16-bit data word
should be used. For example, to connect to an 8-bit DAC, bits Data4-
Data11 should be used. The low order 8 bits are written to by the
chipset, but ignored by the DAC circuitry.
PWM Decoding
The PWM output mode also outputs a sinusoidal desired voltage
waveform for each phase, however the method by which these signals
encode the voltage differ substantially from the DAC16 digital word.
The PWM output mode uses a magnitude signal and a sign signal. The
magnitude signal encodes the absolute value of the output sinusoid and
the sign signal encodes the polarity of the output, positive or negative.
The following diagram shows the magnitude and sign signals for a
single output phase.
PWM Magnitude
(low pass filtered)
+5 V
0V
PWM Sign
+5 V
0V
In this diagram the PWM magnitude signal has been filtered to convert
it from a digital variable duty cycle waveform to an analog signal.
Before filtering this signal contains a pulse-width encoded
representation of the 'analog' desired voltage. In this encoding the duty
cycle of the waveform determines the desired voltage. The PWM cycle
has a frequency of 97.6 kHz, with a resolution of 8 bits, or 1/256.
The following chart shows the encoding.
32
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