M13S64164A View Datasheet(PDF) - [Elite Semiconductor Memory Technology Inc.

Part Name

Description

Manufacturer

M13S64164A

1M x 16 Bit x 4 Banks Double Data Rate SDRAM

[Elite Semiconductor Memory Technology Inc. 

ESMT

M13S64164A

Operation Temperature Condition -40°C~85°C

Essential Functionality for DDR SDRAM

Burst Read Operation

Burst Read operation in DDR SDRAM is in the same manner as the current SDRAM such that the Burst read command is

issued by asserting CS and CAS low while holding RAS and WE high at the rising edge of the clock (CLK) after tRCD from

the bank activation. The address inputs determine the starting address for the Burst, The Mode Register sets type of burst

(Sequential or interleave) and burst length (2, 4, 8). The first output data is available after the CAS Latency from the READ

command, and the consecutive data are presented on the falling and rising edge of Data Strobe (DQS) adopted by DDR SDRAM

until the burst length is completed.

<Burst Length = 4, CAS Latency = 3>

0

1

CLK

CL K

2

3

4

5

6

7

8

CO MMAND READ A

NOP

NO P

NOP

NO P

NOP

NOP

NOP

NO P

CAS L at ency=3

DQS

DQ' s

D out0 Do ut 1 Do ut2 D out3

Elite Semiconductor Memory Technology Inc.

Publication Date : Mar. 2009

Revision : 1.0

15/49

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