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M12L128168A-5BIG View Datasheet(PDF) - [Elite Semiconductor Memory Technology Inc.

Part Name
Description
Manufacturer
M12L128168A-5BIG
ESMT
[Elite Semiconductor Memory Technology Inc. ESMT
M12L128168A-5BIG Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ESMT
M12L128168A
Operation temperature condition -40°C ~85°C
Parameter
Symbol
-5
Col. address to col. address delay tCCD(min)
Number of valid
Output data
CAS latency = 3
CAS latency = 2
Version
-6
1
2
1
Unit
Note
-7
tCK
3
ea
4
Note : 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then
rounding off to the next higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. A new command may be given tRFC after self refresh exit.
6. A maximum of eight consecutive AUTO REFRESH commands (with tRFCmin) can be posted to any given SDRAM, and the
maximum absolute interval between any AUTO REFRESH command and the next AUTO REFRESH command is
8x15.6 μ s.)
AC CHARACTERISTICS (AC operating condition unless otherwise noted)
Parameter
CLK cycle time
CAS latency = 3
CAS latency = 2
CLK to valid
output delay
CAS latency = 3
CAS latency = 2
Output data
hold time
CAS latency = 3
CAS latency = 2
CLK high pulsh width
CLK low pulsh width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
CAS latency = 3
CAS latency = 2
-5
-6
-7
Symbol
MIN MAX MIN MAX MIN MAX
5
6
7
tCC
1000
1000
1000
10
10
10
4.5
5.4
5.4
tSAC
6
6
6
2
tOH
2
2.5
2.5
2.5
2.5
tCH
2
2.5
2.5
tCL
2
2.5
2.5
tSS
1.5
1.5
1.5
tSH
1
1
1
tSLZ
1
1
1
4.5
5.4
5.4
tSHZ
6
6
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns. transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Note
1
1,2
2
3
3
3
3
2
-
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2007
Revision: 1.2
6/43
 

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