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FDR6674A View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
FDR6674A
ADI
Analog Devices ADI
FDR6674A Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADN8830
Pin No.
1
2
3
4
5
Mnemonic
THERMFAULT
THERMIN
SD
TEMPSET
TEMPLOCK
6
NC
7
VREF
8
AVDD
9
OUT B
10
N2
11
P2
12
TEMPCTL
13
COMPFB
14
COMPOUT
15
VLIM
16
VTEC
17
COMPSWOUT
18
COMPSWIN
19
OUT A
20
PVDD
21
P1
22
N1
23
PGND
24
COMPOSC
25
SYNCIN
26
FREQ
27
SOFTSTART
28
SYNCOUT
29
PHASE
30
AGND
31
TEMPOUT
32
NC
EP
Exposed Pad
PIN FUNCTION DESCRIPTIONS
Type
Digital Output
Analog Input
Digital Input
Analog Input
Digital Output
Analog Output
Power
Analog Input
Analog Output
Analog Output
Analog Output
Analog Input
Analog Output
Analog Input
Analog Output
Analog Output
Analog Input
Analog Input
Power
Digital Output
Digital Output
Ground
Analog Input
Digital Input
Analog Input
Analog Input
Digital Output
Analog Input
Ground
Analog Output
Description
Indicates an Open or Short-Circuit Condition from Thermistor.
Thermistor Feedback Input.
Puts Device into Low Current Shutdown Mode. Active low.
Target Temperature Input.
Indicates when Thermistor Temperature is within ± 0.1°C of Target Tem-
perature as Set by TEMPSET Voltage.
No Connection, except as Noted in the Application Notes Section.
2.5 V Reference Voltage.
Power for Nondriver Sections. 3.0 V min; 5.5 V max.
Linear Output Feedback. Will typically connect to TEC+ pin of TEC.
Drives Linear Output External NMOS Gate.
Drives Linear Output External PMOS Gate.
Output of Error Amplifier. Connects to COMPFB through feedforward
section of compensation network.
Feedback Summing Node of Compensation Amplifier. Connects to
TEMPCTL and COMPOUT through compensation network.
Output of Compensation Amplifier. Connects to COMPFB through feed-
back section of compensation network.
Sets Maximum Voltage across TEC.
Indicates Relative Voltage across the TEC. The 1.5 V corresponds to 0 V
across TEC. The 3.0 V indicates maximum output voltage, maximum heat
transfer through TEC.
Compensation for Switching Amplifier.
Compensation for Switching Amplifier. Capacitor connected between
COMPSWIN and COMPSWOUT.
PWM Output Feedback. Will typically connect to TEC– pin of TEC.
Power for Output Driver Sections. 3.0 V min; 5.5 V max.
Drives PWM Output External PMOS Gate.
Drives PWM Output External NMOS Gate.
Power Ground. External NMOS devices connect to PGND. Can be
connected to digital ground as noise sensitivity at this node is not critical.
Connect as Indicated in the Application Notes Section.
Optional Clock Input. If not connected, clock frequency set by FREQ pin.
Sets Switching Frequency.
Controls Initialization Time for ADN8830 with Capacitor to Ground.
Phase Adjusted Clock Output. Phase set from PHASE pin. Can be used to
drive SYNCIN of other ADN8830 devices.
Sets Switching and SYNCOUT Clock Phase Relative to SYNCIN Clock.
Analog Ground. Should be low noise for highest accuracy.
Indication of Thermistor Temperature.
No Connection.
The exposed pad on the bottom of the package must be connected to VCC or the
GND plane.
–4–
REV. D
 

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