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BM29F040 View Datasheet(PDF) - Fujitsu

Part NameDescriptionManufacturer
BM29F040 FLASH MEMORY CMOS 4M (512K ×8) BIT Fujitsu
Fujitsu Fujitsu
BM29F040 Datasheet PDF : 40 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MBM29F040C-55/-70/-90
Type
Manufacture’s
Code
Table 3 MBM29F040C Sector Protection Verify Autoselect Codes
A18 A17 A16 A6
A1
A0
Code
(HEX)
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
X X X VIL VIL VIL 04H 0 0 0 0 0 1 0 0
Device Code
X X X VIL VIL VIH A4H 1 0 1 0 0 1 0 0
Sector
Protection
Sector
Addresses
VIL VIH VIL 01H* 0 0 0 0 0 0 0 1
* : Outputs 01H at protected sector addresses and 00H at unprotected sector addresses.
Sector Address
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
Table 4 Sector Address Tables
A18
A17
A16
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Address Range
00000H to 0FFFFH
10000H to 1FFFFH
20000H to 2FFFFH
30000H to 3FFFFH
40000H to 4FFFFH
50000H to 5FFFFH
60000H to 6FFFFH
70000H to 7FFFFH
Write
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The
command register is written by bringing WE to VIL, while CE is at VIL and OE is at VIH. Addresses are latched on
the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,
whichever happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
Sector Protection
The MBM29F040C features hardware sector protection. This feature will disable both program and erase
operations in any number of sectors (0 through 8). The sector protection feature is enabled using programming
equipment at the user’s site. The device is shipped with all sectors unprotected.
To activate this mode, the programming equipment must force VID on address pin A9 and control pin OE, (suggest
VID = 11.5 V) and CE = VIH. The sector addresses (A18, A17 and A16) should be set to the sector to be protected.
Table 4 defines the sector address for each of the eight (8) individual sectors. Programming of the protection
circuitry begins on the falling edge of the WE pulse and is terminated with the rising edge of the same. Sector
addresses must be held constant during the WE pulse. See figures 11 and 17 sector protection waveforms and
algorithm.
10
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