ADV7300AKST View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADV7300AKST
Analog Devices
ADV7300AKST Datasheet PDF : 68 Pages
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ADV7300A/ADV7301A–SPECIFICATIONS
(VAA = VDD = 2.375 V–2.625 V, VDD_IO = 2.375 V–3.600 V, VREF = 1.235 V, RSET = 760 ⍀, RLOAD = 150 ⍀, TMIN to TMAX (0؇C to 70؇C), unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
Test Conditions
STATIC PERFORMANCE1
Resolution
Integral Nonlinearity
Differential Nonlinearity, +ve2
Differential Nonlinearity, –ve2
DIGITAL OUTPUTS
Output Low Voltage, VOL
Output High Voltage, VOH
Three-State Leakage Current
Three-State Output Capacitance
12
± 2.0
0.25
2.0
2.4 [2.0]3
± 1.0
2
Bits
LSB
LSB
LSB
0.4 [0.4]3 V
V
µA
pF
VAA = 2.5 V
VAA = 2.5 V
ISINK = 3.2 mA
ISOURCE = 400 µA
VIN = 0.4 V, 2.4 V
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Leakage Current
Input Capacitance, CIN
ANALOG OUTPUTS
Full-Scale Output Current
Output Current Range
Full-Scale Output Current
Output Current Range
DAC to DAC Matching
Output Compliance Range, VOC
Output Capacitance, COUT
VOLTAGE REFERENCE
Reference Range, VREF
POWER REQUIREMENTS
Normal Power Mode
IDD4
IDD_IO
IAA5,6
Sleep Mode
IDD
IAA
IDD_IO
Power Supply Rejection Ratio
2
V
0.8
V
1
µA
2
pF
8.2
8.7
9.2
mA
8.2
8.7
9.2
mA
4.1
4.35
4.6
mA
4.1
4.35
4.6
mA
2.0
%
0
1.0
1.4
V
7
pF
1.15
1.235
1.3
V
93
mA
52
mA
84
mA
90
110
mA
99
mA
108
mA
0.2
mA
70
75
mA
130
µA
10
µA
110
µA
0.01
%/%
VIN = 2.4 V
RSET1, 2 = 1520 Ω
RSET1, 2 = 1520 Ω
SD Only [8ϫ]
PS Only [4ϫ]
HDTV Only [2ϫ]
SD and PS
SD [8ϫ] and HDTV
SD and HDTV [2ϫ]
NOTES
1Oversampling disabled. Static DAC performance will be improved with increased oversampling ratios.
2DNL measures the deviation of the actual DAC o/p voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for –ve DNL, the
actual step values lie below the ideal step value.
3Value in brackets for VDD_IO = 2.375 V to 2.750 V.
4IDD or the circuit current is the continuous current required to drive the digital core without the I PLL.
5IAA is the total current required to supply all DACs including the VREF and PLL circuitry.
6All DACs on.
Specifications subject to change without notice.
REV. A
–3–
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