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ADM1232ARMZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADM1232ARMZ
ADI
Analog Devices ADI
ADM1232ARMZ Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC 1
PB RESET 2
NC 3
TD 4
NC 5
TOLERANCE 6
NC 7
GND 8
16 NC
ADM1232
TOP VIEW
(Not to Scale)
15 VCC
14 NC
13 STROBE
12 NC
11 RESET
10 NC
9 RESET
NC = NO CONNECT
Figure 3. RW-16 Pin Configuration
ADM1232
PB RESET 1
TD 2
TOLERANCE 3
GND 4
ADM1232
TOP VIEW
(Not to Scale)
8 VCC
7 STROBE
6 RESET
5 RESET
Figure 4. RM-8 Pin Configuration
PB RESET 1
TD 2
TOLERANCE 3
GND 4
ADM1232
TOP VIEW
(Not to Scale)
8 VCC
7 STROBE
6 RESET
5 RESET
Figure 5. N-8 and R-8 Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
RW-16
N-8, R-8,
RM-8
1, 3, 5, 7,
10, 12,
14, 16
2
1
Mnemonic
NC
PB RESET
4
2
TD
6
3
8
4
9
5
11
6
13
7
15
8
TOLERANCE
GND
RESET
RESET
STROBE
VCC
Description
No Connection.
Push-Button Reset Input. This debounced input ignores pulses of less than 1 ms and is
guaranteed to respond to pulses greater than 20 ms.
Time Delay Set. This input allows the user to select the maximum amount of time that the
ADM1232 allows the STROBE input to remain inactive—that is, STROBE is not receiving any
high-to-low transitions—without forcing the ADM1232 to generate a RESET pulse.
See the Specifications section, Figure 8, and the STROBE Timeout Selection section.
Tolerance Input. This input determines how much the supply voltage is allowed to decrease (as a
percentage) before a RESET is asserted. Connect this pin to VCC for 10% and to GND for 5%.
0 V Ground Reference for All Signals.
Active High Logic Output. This pin is asserted when any of the following events occurs:
VCC decreases below the amount specified by the TOLERANCE input; when PB RESET is forced low;
if there are no high-to-low transitions within the limits set by TD at STROBE; and during power-up.
Inverse of RESET. This pin has an open-drain output.
The STROBE input is used to monitor the activity of a microprocessor. If there are no high-to-low
transitions within the time specified by TD, a reset is asserted.
Power Supply Input, 5 V.
Rev. C | Page 5 of 12
 

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